Recently, 2D electron gases have been observed in atomically thin semiconducting crystals, enabling the observation of rich physical phenomena at the quantum level within the ultimate thickness limit. However, the observation of 2D electron gases and subsequent quantum Hall effect require exceptionally high crystalline quality, rendering mechanical exfoliation as the only method to produce high‐quality 2D semiconductors of black phosphorus and indium selenide (InSe), which hinder large‐scale device applications. Here, the controlled one‐step synthesis of high‐quality 2D InSe thin films via chemical vapor transport method is reported. The carrier Hall mobility of hexagonal boron nitride (hBN) encapsulated InSe flakes can be up to 5000 cm2V−1s−1at 1.5 K, enabling to observe the quantum Hall effect in a synthesized van der Waals semiconductor. The existence of the quantum Hall effect in directly synthesized 2D semiconductors indicates a high quality of the chemically synthesized 2D semiconductors, which hold promise in quantum devices and applications with high mobility.
Black phosphorus (BP) has recently attracted significant attention due to its exceptional physical properties. Currently, high‐quality few‐layer and thin‐film BP are produced primarily by mechanical exfoliation, limiting their potential in future applications. Here, the synthesis of highly crystalline thin‐film BP on 5 mm sapphire substrates by conversion from red to black phosphorus at 700 °C and 1.5 GPa is demonstrated. The synthesized ≈50 nm thick BP thin films are polycrystalline with a crystal domain size ranging from 40 to 70 µm long, as indicated by Raman mapping and infrared extinction spectroscopy. At room temperature, field‐effect mobility of the synthesized BP thin film is found to be around 160 cm2V−1s−1along armchair direction and reaches up to about 200 cm2V−1s−1at around 90 K. Moreover, red phosphorus (RP) covered by exfoliated hexagonal boron nitride (hBN) before conversion shows atomically sharp hBN/BP interface and perfectly layered BP after the conversion. This demonstration represents a critical step toward the future realization of large scale, high‐quality BP devices and circuits.
more » « less- PAR ID:
- 10049007
- Publisher / Repository:
- Wiley Blackwell (John Wiley & Sons)
- Date Published:
- Journal Name:
- Advanced Materials
- Volume:
- 30
- Issue:
- 6
- ISSN:
- 0935-9648
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
-
Abstract -
Abstract Single‐walled carbon nanotubes (SWCNTs) are a class of 1D nanomaterials that exhibit extraordinary electrical and optical properties. However, many of their fundamental studies and practical applications are stymied by sample polydispersity. SWCNTs are synthesized in bulk with broad structural (chirality) and geometrical (length and diameter) distributions; problematically, all known post‐synthetic sorting methods rely on ultrasonication, which cuts SWCNTs into short segments (typically <1 µm). It is demonstrated that ultralong (>10 µm) SWCNTs can be efficiently separated from shorter ones through a solution‐phase “self‐sorting”. It is shown that thin‐film transistors fabricated from long semiconducting SWCNTs exhibit a carrier mobility as high as ≈90 cm2V−1s−1, which is ≈10 times higher than those which use shorter counterparts and well exceeds other known materials such as organic semiconducting polymers (<1 cm2V−1s−1), amorphous silicon (≈1 cm2V−1s−1), and nanocrystalline silicon (≈50 cm2V−1s−1). Mechanistic studies suggest that this self‐sorting is driven by the length‐dependent solution phase behavior of rigid rods. This length sorting technique shows a path to attain long‐sought ultralong, electronically pure carbon nanotube materials through scalable solution processing.
-
Abstract The first experimental realization of the intrinsic (not dominated by defects) charge conduction regime in lead‐halide perovskite field‐effect transistors (FETs) is reported. The advance is enabled by: i) a new vapor‐phase epitaxy technique that results in large‐area single‐crystalline cesium lead bromide (CsPbBr3) films with excellent structural and surface properties, including atomically flat surface morphology, essentially free from defects and traps at the level relevant to device operation; ii) an extensive materials analysis of these films using a variety of thin‐film and surface probes certifying the chemical and structural quality of the material; and iii) the fabrication of nearly ideal (trap‐free) FETs with characteristics superior to any reported to date. These devices allow the investigation of the intrinsic FET and (gated) Hall‐effect carrier mobilities as functions of temperature. The intrinsic mobility is found to increase on cooling from ≈30 cm2V−1s−1at room temperature to ≈250 cm2V−1s−1at 50 K, revealing a band transport limited by phonon scattering. Establishing the intrinsic (phonon‐limited) mobility provides a solid test for theoretical descriptions of carrier transport in perovskites, reveals basic limits to the technology, and points to a path for future high‐performance perovskite electronic devices.
-
IEEE (Ed.)In this project, Hall bar devices with black phosphorus (BP) as the semiconductor layer were fabricated to measure the Hall mobility and carrier density of exfoliated BP flakes obtained from bulk crystals acquired from various commercial sources. Black phosphorus is proposed as an alternative material for terahertz photoconductive antennas (PCAs) from the standard GaAs or InGaAs PCAs that are currently available commercially. Black phosphorus is an anisotropic material with a reported Hall mobility over three times greater than GaAs, but our preliminary testing of BP PCAs has shown dramatic differences of electrical properties between black phosphorus sourced from three different vendors. To determine the best quality black phosphorus source, Hall bar devices containing 40 nm BP flakes were used to measure the carrier mobility of the semiconductor. A Hall bar device is created by layering a 40nm BP flake underneath a hexagonal boron-nitride (hBN) flake, all on top of gold contacts in a Hall bar arrangement fabricated on a high-resistivity silicon substrate. The hBN acts as a passivation layer for the BP so that it may be safely removed from the glove box without damage. The Hall mobility of the material from different sources ranges from around 100 cm2/Vs to 1600 cm2/Vs, with only one source showing promising, high mobility results. This study allows BP with optimized electrical properties to be incorporated into THz PCAs for characterization via THz time domain spectroscopy.more » « less
-
Abstract New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm2V−1s−1, due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm2V–1s–1and a subthreshold slope of 0.29 V dec–1. Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐
k gate insulator (ALD Al2O3), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.