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1. A Low Phase Noise 28 GHz VCO Using Transformer-based Q-enhanced Active Impedance Converter

   https://doi.org/10.1109/IMS37962.2022.9865389  

   Hoque, Md Aminul ; Chahadori, Mohammad ; Mokri, Mohammad Ali ; Mohapatra ; Soumen Mohapatra ; Kar, Dipan ; Heo, Deukhyoun ( July 2022 , IEEE International Microwave Symposium)

   This paper presents a low phase noise 28 GHz voltage-controlled oscillator (VCO) using a transformer-based active impedance converter to enhance the quality factor (Q) of the capacitor in the resonator. The active impedance converter can enhance the Q of a capacitor bank and varactor by 25-40% across the VCO’s tuning range. The proposed VCO is fabricated using the proposed transformer-based Q-enhancement impedance converter in a standard 65 nm CMOS process. The VCO achieves a 15.9% measured fractional frequency tuning range and phase noise of −107.6 dBc/Hz at 1 MHz offset from 28 GHz oscillation frequency while occupying only 0.05 mm2 area (200 μm × 250 μm). The VCO consumes 5.1 mW power, resulting in an excellent figure-of-merit (FoM) of 189.4 dBc/Hz and a figure-of-merit-with-area (FoMA) of 202.8 dBc/Hz. 

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2. A Compact Mm-Wave Multi-Band VCO Based on Triple-Mode Resonator for 5G and Beyond

   Chahardori, Mohammad ; Hoque MD Aminul ; Mokri Mohammad Ali ; Heo, Deukhyoun Heo ( July 2022 , IEEE RFIT 2022)

   We present a low phase noise four-core triple-band voltage controlled-oscillator (VCO) with reconfigurable oscillator cores and multi-mode resonator. By activation/deactivation of oscillator cores and change of resonator impedance in three modes of operations, the proposed VCO provides complete freedom in selecting the resonance frequency for three operation bands in the mm-wave range. Compared to VCOs using switch-capacitor-bank for multi-band operation, the proposed VCO does not use any series switches with passive components in the resonator to provide a low phase noise in all three bands of operation. As a proof of concept, the proposed four-core triple-band VCO is implemented in a 65 nm CMOS process using four class-D oscillators with tail switches and a compact high-Q triple-mode resonator. The VCO oscillation frequencies center at 19, 28, and 38 GHz while providing good phase noise and low power consumption in all bands. Measured results show the total frequency tuning range (FTR) of 38.5% while the PN at 1MHz offset varies from -100.3 dBc/Hz to -106.06dBc/Hz resulting in an excellent FoMT of 199.8 dBc/Hz. 

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3. A 23.7 to 29.9 GHz Tunable Fully Differential Voltage Controlled Oscillator Designed in 180nm CMOS process

   https://doi.org/10.1109/DCAS57389.2023.10130248  

   Kakaraparty, Karthik ; Mahbub, Ifana ( April 2023 , 2023 IEEE 16th Dallas Circuits and Systems Conference (DCAS))

   This paper presents the design of a 23.7 to 29.9 GHz wide tuning range VCO (Voltage Controlled Oscillator) designed using a 180 nm CMOS process. In order to achieve a good phase noise performance and get a wide frequency tuning range, cross-coupling and gate biasing techniques are utilized in the proposed cross-coupled LC VCO architecture. The simulated phase noise of −130 dBc/Hz is achieved at a 1 MHz offset. With the supply voltage of 1.8 V, the total power consumption of the VCO is 32.04 mW. The proposed VCO has good performance in terms of low-phase noise and has a wide frequency tuning range, which makes it highly suitable for millimeter wave-based applications. 

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4. Protecting analog circuits with parameter biasing obfuscation

   https://doi.org/10.1109/LATW.2017.7906739  

   Rao, Vaibhav Venugopal ; Savidis, Ioannis ( March 2017 , 2017 IEEE Latin American Test Symposium (LATS))

   A methodology to secure analog intellectual property (IP) by obfuscating biasing conditions is presented in this paper. Previous research methodologies have focused on protecting digital IP from theft, overproduction, counterfeiting, and Trojan insertion. Analog IP has not been investigated as it does not share the same replicated structures and functionalities used for digital protection. The bias encryption techniques presented in this paper are implemented on a phase locked loop (PLL). The operating frequency of the PLL is masked in the range of 800 MHz to 2.2 GHz with a 40-bit encryption key. The probability of determining the correct key through brute force attack is 9.095×10-13. The overheads of encrypting the PLL include a 6.3% increase in active area, a 0.89% increase in power consumption, and a 5 dBc/Hz increase in phase noise. 

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5. Design and Validation of a Low-Cost Mobile EEG-Based Brain–Computer Interface

   https://doi.org/10.3390/s23135930  

   Craik, Alexander ; González-España, Juan José ; Alamir, Ayman ; Edquilang, David ; Wong, Sarah ; Sánchez Rodríguez, Lianne ; Feng, Jeff ; Francisco, Gerard E. ; Contreras-Vidal, Jose L. ( July 2023 , Sensors)

   Objective: We designed and validated a wireless, low-cost, easy-to-use, mobile, dry-electrode headset for scalp electroencephalography (EEG) recordings for closed-loop brain–computer (BCI) interface and internet-of-things (IoT) applications. Approach: The EEG-based BCI headset was designed from commercial off-the-shelf (COTS) components using a multi-pronged approach that balanced interoperability, cost, portability, usability, form factor, reliability, and closed-loop operation. Main Results: The adjustable headset was designed to accommodate 90% of the population. A patent-pending self-positioning dry electrode bracket allowed for vertical self-positioning while parting the user’s hair to ensure contact of the electrode with the scalp. In the current prototype, five EEG electrodes were incorporated in the electrode bracket spanning the sensorimotor cortices bilaterally, and three skin sensors were included to measure eye movement and blinks. An inertial measurement unit (IMU) provides monitoring of head movements. The EEG amplifier operates with 24-bit resolution up to 500 Hz sampling frequency and can communicate with other devices using 802.11 b/g/n WiFi. It has high signal–to–noise ratio (SNR) and common–mode rejection ratio (CMRR) (121 dB and 110 dB, respectively) and low input noise. In closed-loop BCI mode, the system can operate at 40 Hz, including real-time adaptive noise cancellation and 512 MB of processor memory. It supports LabVIEW as a backend coding language and JavaScript (JS), Cascading Style Sheets (CSS), and HyperText Markup Language (HTML) as front-end coding languages and includes training and optimization of support vector machine (SVM) neural classifiers. Extensive bench testing supports the technical specifications and human-subject pilot testing of a closed-loop BCI application to support upper-limb rehabilitation and provides proof-of-concept validation for the device’s use at both the clinic and at home. Significance: The usability, interoperability, portability, reliability, and programmability of the proposed wireless closed-loop BCI system provides a low-cost solution for BCI and neurorehabilitation research and IoT applications. 

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