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Title: A 7.7~10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS
Award ID(s):
1821819
PAR ID:
10165544
Author(s) / Creator(s):
;
Date Published:
Journal Name:
2020 IEEE Custom Integrated Circuits Conference (CICC)
Page Range / eLocation ID:
1 to 4
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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  2. null (Ed.)