Sun, Yi, Zhang, Fanchen, Jiang, Hui, Nepal, Kundan, Dworak, Jennifer, Manikas, Theodore, and Bahar, R. Iris. Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack. Retrieved from https://par.nsf.gov/biblio/10185994. Journal of Electronic Testing 35.6 Web. doi:10.1007/s10836-019-05845-5.

Sun, Yi, Zhang, Fanchen, Jiang, Hui, Nepal, Kundan, Dworak, Jennifer, Manikas, Theodore, & Bahar, R. Iris. Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack. Journal of Electronic Testing, 35 (6). Retrieved from https://par.nsf.gov/biblio/10185994. https://doi.org/10.1007/s10836-019-05845-5

Sun, Yi, Zhang, Fanchen, Jiang, Hui, Nepal, Kundan, Dworak, Jennifer, Manikas, Theodore, and Bahar, R. Iris. "Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack". Journal of Electronic Testing 35 (6). Country unknown/Code not available. https://doi.org/10.1007/s10836-019-05845-5. https://par.nsf.gov/biblio/10185994.

@article{osti_10185994,
place = {Country unknown/Code not available}, title = {Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack}, url = {https://par.nsf.gov/biblio/10185994}, DOI = {10.1007/s10836-019-05845-5}, abstractNote = {}, journal = {Journal of Electronic Testing}, volume = {35}, number = {6}, author = {Sun, Yi and Zhang, Fanchen and Jiang, Hui and Nepal, Kundan and Dworak, Jennifer and Manikas, Theodore and Bahar, R. Iris}, }