Monolithic III-V/Si integration is a decades-long materials technology development target for application to a wide range of electronic and photonic device and circuit architectures. One commonly considered, and well-studied, integration pathway is via direct epitaxial growth of GaP onto Si, [1][2][3][4][5][6] with subsequent compositional (strain) grading to achieve the target lattice constant for device integration. 7,8 Although GaP provides the smallest lattice mismatch to Si of any available III-V binary compound, a compressive GaP/Si misfit (-0.36% at room temperature) does still exist. Furthermore, due to the mismatch in thermal expansion coefficients, this misfit increases with temperature, reaching -0.5% or more at typical growth conditions. This non-negligible strain renders it essentially impossible to avoid nucleation of strain-relieving dislocation loops at GaP thicknesses over ~40 nm. 9 Because the vertical threading dislocation (TD) segments that result are sources of generation-recombination activity in III-V semiconductors, [10][11][12] the threading dislocation density (TDD) must be minimized to enable use of this integrated materials platform for any kind of optoelectronic application. TDD minimization through dislocation introduction and evolution control within the GaP/Si system is made difficult by both the significant (and variable) inherent misfit, and the relatively poor dislocation glide dynamics of GaP (at least compared to any other common zincblende binary III-V). 13 As such, it has taken many years to begin to achieve TDD values in GaP/Si approaching 10 6 cm -2a target commonly cited to mitigate the majority of the detrimental TDD impact in optoelectronic devices. 10,14,15 Nonetheless, the optimized processes developed to obtain such TDD require precise growth parameter and structure control, and the potential for significant further reduction and scalability via this route is unknown. mismatch between GaP and Si themselves cannot be reduced, an alternative option is to insert layers composed of compatible materials with lattice constants spanning between the two. The dilute-N GaNyP1-y alloy range is often employed for this purpose, 18 but another potential candidate is the dilute-B BxGa1-xP system, 19 which can similarly bridge the mismatch between Si and GaP, including exact matching to Si.

Although the BxGa1-xAs alloy system has received some attention over the years, [20][21][22][23] BxGa1-xP has received relatively little, especially with respect to growth via molecular beam epitaxy (MBE). 24 This appears to be due to two major issues: a wide thermodynamic miscibility gap across nearly the entire compositional range (0.02 < x < 0.99) 25 and complexities in the use of B as a growth constituent. To date, reports of MBE-grown BxGa1-xP are consistent with such a miscibility limit, with 1.2% B fraction the highest noted thus far. 24 However, fractions as high as 7.8% have been demonstrated in material grown via metal-organic chemical vapor deposition (MOCVD), 21,[26][27][28] suggesting that higher compositions may still be possible via MBE growth, where the lower substrate temperatures may help promote metastability.

In terms of growth complexity, most, if not all, previously-reported growths of B-containing III-V alloys by MBE used solid sources, supplying B via either Knudsen effusion cells or electron-beam evaporation systems. 20,24,29 However, alloying readily occurs between B and the metals commonly used in high-temperature crucibles and electron-beam filaments, leading to rapid embrittlement and mechanical failure. [30][31][32] Furthermore, the extremely high temperatures needed for B sublimation leads to degradation of standard pyrolytic BN crucibles and excessive concentrations of C impurity incorporation from graphite crucibles. Therefore, as a potential approach for avoiding these issues, we have instead investigated the use of a readily available gas-source precursor, BCl3.

All MBE growths reported herein were performed in a modified solid-source Varian Gen-II MBE system with a P2 valved cracker cell. A gas injection line typically reserved for CBr4 (i.e. C-doping precursor) was retrofitted to supply pure vapor-phase BCl3, with no additional carrier gas or thermal cracking, relying on pyrolysis and chemical reactivity to liberate the B at the growth surface. The BCl3 flux was controlled by manually adjusting the position of an ultra-high vacuum leak valve. Reflection high-energy electron diffractometry (RHEED) was used for in-situ growth monitoring. Substrate temperatures were measured with an infrared pyrometer calibrated to the experimental GaAs oxide desorption point. Group-III and V beam fluxes were measured using a beam equivalent pressure (BEP) ion gauge, and all flux ratios reported are based directly on BEP measured values. Background pressure in the chamber was typically ~3×10 -10 Torr. Following BCl3-based growths, residual gas analysis did identify the presence of Cl-based species, but at sufficiently low partial pressures to be of no concern.

Growths were performed using either commercial, epi-ready GaP(001) wafers or inhouse produced GaP/Si(001) templates. The latter, a standard design used by the authors in other processes, consisted of a 50 nm GaP layer grown on Si(001) substrates, with intentional offcuts of 2° toward [110], via MOCVD in an Aixtron close-coupled showerhead reactor. Details on the template growth method have been previously reported. 33 All such templates exhibited epi-ready smooth surface morphologies and low TDD of no more than ~7×10 4 cm -2 . BxGa1-xP composition calibration growths were performed at 500-550 °C, with P2:Ga ratios of 4-6, and nominal growth rate of ~0.5 μm/hr. Relative B fraction was adjusted via BCl3 flux, with Ga flux kept constant. All calibration growths were performed on GaP substrates for ease of analysis. Within these narrow parameter ranges, only the BCl3 vs. Ga flux ratio was found to yield any significant compositional impact.

Following calibration, a number of samples were grown on the 50 nm GaP/Si templates using a combination of two different MBE growth parameter sets. The "high temperature" (HT) conditions employed a 640°C substrate temperature and a P2:Ga ratio of 16; "low This is the author's peer reviewed, accepted manuscript. However, the online version of record will be different from this version once it has been copyedited and typeset.

PLEASE CITE THIS ARTICLE AS DOI: 10.1063/5.0021493

temperature" (LT) conditions were 500°C and P2:Ga ratio of 5. Both conditions used a target growth rate of ~0.5 μm/hr. Except where noted, the BxGa1-xP test growths followed the LT conditions, and the P2 flux was fixed (i.e. not adjusted to account for the addition of the BCl3).

HT and LT conditions, including for the initial calibration growths, were based largely upon prior work by the authors on high-temperature GaP homoepitaxy and low-temperature GaP/Si heteroepitaxy, respectively. 1,34 Subsequent TEM analysis (Figure 4) indicated that while the actual growth rate was as expected for GaP, that of the BGaP was somewhat lower at ~0.4 μm/hr. This suggests the possibility of BCl3-based growth interference, possibly via reaction with Ga in the gas phase or Cl-based etching of Ga from the growth surface.

Prior to growth initiation, all substrate surfaces were prepared via oxide desorption at 660°C for approximately 5 minutes under P2 overpressure. This was followed by the growth of a HT-GaP smoothing layer, with a target thickness of 100 nm for the GaP wafers and 10 nm for the GaP/Si templates. This layer was kept thin for the smooth epitaxial GaP/Si templates, which were already above critical thickness, to prevent excessive dislocation formation. 7 None of the MBE-grown epilayers, including the calibration samples, were intentionally doped.

Finally, limited test growth of additional thick GaP was performed on the BGaP/GaP/Si virtual substrate in the same MOCVD as used for the GaP/Si template production. 500 nm of n-type (~2×10 18 cm -3 ) GaP was grown at a substrate temperature of 625°C, a growth rate of 0.42 μm/hr, a V:III molar flow ratio of 40, and a total reactor pressure of 150 mbar; precursors used were phosphine, trimethylgallium, and silane. In-situ monitoring of the growth was done using a k-Space Associates Integrated Control for Epitaxy (ICE) reflectance/pyrometry system. Symmetric (004) and grazing-incidence (224) reciprocal space maps (RSMs) of all samples were collected using a Bede D1 high-resolution triple-axis X-ray diffractometer (XRD) and used for calculation of epilayer lattice constants, strain states, and compositions. Film surface morphologies and roughness values were measured using a Bruker AXS Dimension Icon atomic force microscope (AFM). Characterization of dislocation populations was performed via electron channeling contrast imaging (ECCI) in an FEI Apreo scanning electron microscope (SEM) equipped with a backscattered electron detector, similar to our prior reports. 9,35 Finally, cross-sectional transmission electron microscopy (TEM) specimens were prepared via focused ion beam using an FEI Helios Nanolab 600 dual-beam instrument. Subsequent TEM diffraction contrast imaging of the dislocation content was then performed in an FEI Tecnai F20 TEM with an accelerating voltage of 200 kV. 36 Because the reaction rate of BCl3 and incorporation of B into the growing film was unknown, initial work sought to establish a relationship between BCl3 flux and resultant BxGa1-xP composition. Figure 1 Using linear thermal expansion coefficients for Si, GaP, and BxGa1-xP of 2.60×10 -6 °C-1 , 4.65×10 -6 °C-1 , and (4.65x)×10 -6 °C-1 , respectively, 37 the B composition to achieve lattice-matching to Si at a given temperature may be determined. 38 However, due to the aforementioned thermal expansion mismatch, said lattice-matching is only valid for that specific temperature. Because the objective for such lattice-matching is to ultimately enable high-quality subsequent III-V growth, we consider lattice-matching constraints over a range of typical III-V growth temperatures (for both MBE and MOCVD), as depicted in Figure 2(a). The BxGa1-xP-Si misfit at the LT growth temperature, 500°C, and serving as an approximate lower bound for III-V growth, in general, is given by the blue dashed line. As a common high-temperature ceiling for III-V growth, an upper bound of 800°C is indicated by the red dashed line. The region between these upper and lower limits and bounded by their intersections with the zero-strain line -2.7% ≤ x ≤ 3.1%we define as the region of effective lattice-matching. Essentially, any BxGa1-xP/Si heterostructure grown within this range of temperature and composition should remain pseudomorphic up to a thickness of around 150 nm or more, at which point the Matthews-Blakeslee critical thickness is reached. 7 To probe the effectiveness of the MBE-grown BxGa1-xP for lattice-matching to Si, the comparative structures depicted in Fig. 2(b) were grown on GaP/Si templates. Here we targeted a B fraction of 3.0%, nominally ideal for lattice-matching at 750°C, the maximum temperature typically used in our growth processes. Following a ~10 nm HT-GaP smoothing layer, the control sample received ~100 nm of LT-GaP while the test sample received ~100 nm of target LT-B0.03Ga0.97P; based on the calibration from Fig. 1, a BCl3:Ga flux ratio of ~4.1 was used. This is the author's peer reviewed, accepted manuscript. However, the online version of record will be different from this version once it has been copyedited and typeset.

Streaky 2×4 RHEED patterns were observed for the MOCVD-grown GaP/Si templates upon entry into the reactor and throughout the growth of the HT-GaP smoothing layer. However, during the LT growths, the RHEED of both samples quickly transitioned to a 2×1 pattern with "chunky" appearance, indicating surface roughening ostensibly related to low surface adatom diffusivity. The B0.03Ga0.97P/GaP/Si test sample growths exhibited a poorer quality pattern than that of the control samples, likely due to the relatively high BCl3 flux and associated surface interactions. Surface morphologies of both films were found to be similar via AFM, presented in Fig. 2(c), with a root-mean-squared roughness of ~1.2 nm. I lists the extracted room and growth temperature values for the in-plane and out-of-plane lattice constants, a|| and a⊥, and residual internal strains, ε|| and ε⊥, of the epilayers in both experimental structures. Growth temperature values are calculated based on thermal expansion, as previously discussed; 38 these are also plotted in Fig. 2(a) for comparison. The ~160 nm total thickness GaP/Si control was found to be nearly pseudomorphic (~3% relative relaxation at room temperature), likely due to the low growth temperature, with a|| of 5.438 Å and εres of -0.45% (compressive) at growth temperature. The ~100 nm LT-BxGa1-xP layer of the test sample was determined to possess an exact composition of B0.031Ga0.969P, with a|| of 5.437 Å and εres of +0.06% (tensile) at growth temperature. The ~60 nm HT-GaP layer sandwiched between the B0.03Ga0.97P and Si was found to be entirely unrelaxed, confirming the achievement of effective strain balancing. Uncertainty in the reported a and ε values are estimated to be approximately ±0.001 Å and ±0.01%, respectively.

To examine the dislocation content in these films, ECCI was employed, the results of which are presented in Figure 3. All images were taken at the g = [040] condition to ensure visibility of any resident dislocations. For reference, an ECCI micrograph of a representative 50 nm GaP/Si template is presented in Fig. 3(a). A small number of misfit dislocations (MDs) are visible, insufficient to provide any measurable relaxation, but clearly demonstrating that 50 nm is indeed beyond the critical thickness. The GaP/Si control sample is shown in Fig. 3(b), where the much denser network of interfacial MDs resulting from the partial relaxation indicated by the XRD measurements can be Table I. In-plane and out-of-plane lattice constants, a|| and a⊥, and residual internal strains, ε|| and ε⊥, of the epilayers in the GaP/Si (control) and B0.03Ga0.97P/GaP/Si (test) structures at room (20°C) and growth (500°C) temperatures. Equivalent (bulk) Si values are also provided for reference.

Epilayer Using the ECCI images shown in Fig. 3, as well as numerous additional images collected over total areas of at least 10,000 μm 2 , the TDD of the structures represented can be estimated by counting the endpoints of the observed MDseach dislocation loop consists of the interfacial MD with two TD segments extending to the epilayer surface, and thus TDD can be determined as twice the MD density. In this manner, the 50 nm GaP/Si template, Fig. 3(a), was found to possess an approximate TDD of 7 ± 1 × 10 4 cm -2 . The B0.03Ga0.97P/GaP/Si structure was found to be slightly higher at 2.7 ± 0.6 × 10 5 cm -2 . Given the very small tensile strain of the B0.03Ga0.97P layer, it is likely that much (or even all) of this ~4× increase in TDD actually resulted from HT-GaP smoothing layer, where the higher temperature and additional GaP thickness is sufficient to induce additional dislocation introduction. It should thus be possible to reduce this TDD by minimizing the thickness of the starting GaP layer and/or eliminating the smoothing layer, especially given the already high-quality epitaxial surface of the template.

The GaP/Si control sample cannot be counted in the same simple manner due to the much denser MD network, making identification of the endpoints (and thus TDs) difficult to distinguish. However, given the obviously much higher density of dislocations present and the very small degree of relaxation (~3%), it is clear that the efficacy of the strain reliefi.e. magnitude of strain relieved per dislocation, or effectively the average dislocation lengthis undoubtedly sub-optimal. Prior results, from both the authors and others, for slightly thicker (200-250 nm) GaP/Si grown at a slightly higher and more optimal temperature (530°C) give TDD of over 1×10 6 cm -2 . 14 As such, this seems a reasonable approximate estimate here, with likely even higher density with continued growth.

Finally, in the case of an ideal strain-free BxGa1-xP/Si virtual substrate, it is expected that any dislocation introduction and glide occurring due to subsequent lattice-mismatched growthsuch as for pure GaP overgrowth or a GaAsyP1-y graded bufferwould be confined to the upper III-V/BxGa1-xP interface. To examine whether this is indeed the case for the B0.03Ga0.97P/GaP/Si structure reported here, a 1 cm × 1 cm piece of the same sample shown in Fig. 3(c) was transferred to the MOCVD and 500 nm of GaP was grown. Figure 4 presents a representative g = [004] 2-beam dark-field TEM image taken from a [110]-oriented cross-sectional foil from this sample. Here we indeed find all of the MD content lying at the upper GaP/B0.03Ga0.97P interface, with no observed MD content at the GaP/Si interface, and the strain fields extending through the B0.03Ga0.97P indicate full coherence. XRD analysis of this structure reveals that the GaP overlayer is ~90% relaxed at room temperature (or ~70% at growth temperature), typical for ~500 nm of GaP on Si. 14 This work has demonstrated the growth of strain-free, low-TDD (<3×10 5 cm -2 ) B0.03Ga0.97P on Si by MBE using a combination of solid (Ga, P) and gas (BCl3) sources. Furthermore, we have demonstrated the efficacy of such a layer as a Simatched III-V virtual substrate, constraining misfit dislocation content to the upper III-V/B0.03Ga0.97P interface, thereby enabling This is the author's peer reviewed, accepted manuscript. However, the online version of record will be different from this version once it has been copyedited and typeset.

PLEASE CITE THIS ARTICLE AS DOI: 10.1063/5.0021493 more careful control of strain introduction than inherently available in the direct GaP/Si system.