Zhang, Rui, Liu, Taizhi, Yang, Kexin, Chen, Chang-Chih, and Milor, Linda. SRAM Stability Analysis and Performance–Reliability Tradeoff for Different Cache Configurations. Retrieved from https://par.nsf.gov/biblio/10199381. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28.3 Web. doi:10.1109/TVLSI.2019.2956923.

Zhang, Rui, Liu, Taizhi, Yang, Kexin, Chen, Chang-Chih, & Milor, Linda. SRAM Stability Analysis and Performance–Reliability Tradeoff for Different Cache Configurations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28 (3). Retrieved from https://par.nsf.gov/biblio/10199381. https://doi.org/10.1109/TVLSI.2019.2956923

Zhang, Rui, Liu, Taizhi, Yang, Kexin, Chen, Chang-Chih, and Milor, Linda. "SRAM Stability Analysis and Performance–Reliability Tradeoff for Different Cache Configurations". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (3). Country unknown/Code not available. https://doi.org/10.1109/TVLSI.2019.2956923. https://par.nsf.gov/biblio/10199381.

@article{osti_10199381,
place = {Country unknown/Code not available}, title = {SRAM Stability Analysis and Performance–Reliability Tradeoff for Different Cache Configurations}, url = {https://par.nsf.gov/biblio/10199381}, DOI = {10.1109/TVLSI.2019.2956923}, abstractNote = {}, journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, volume = {28}, number = {3}, author = {Zhang, Rui and Liu, Taizhi and Yang, Kexin and Chen, Chang-Chih and Milor, Linda}, editor = {null} }