skip to main content


Title: Femtosecond-laser sharp shaping of millimeter-scale geometries with vertical sidewalls
Abstract

As femtosecond (fs) laser machining advances from micro/nanoscale to macroscale, approaches capable of machining macroscale geometries that sustain micro/nanoscale precisions are in great demand. In this research, an fs laser sharp shaping approach was developed to address two key challenges in macroscale machining (i.e. defects on edges and tapered sidewalls). The evolution of edge sharpness (edge transition width) and sidewall tapers were systematically investigated through which the dilemma of simultaneously achieving sharp edges and vertical sidewalls were addressed. Through decreasing the angle of incidence (AOI) from 0° to −5°, the edge transition width could be reduced to below 10µm but at the cost of increased sidewall tapers. Furthermore, by analyzing lateral and vertical ablation behaviors, a parameter-compensation strategy was developed by gradually decreasing the scanning diameters along depth and using optimal laser powers to produce non-tapered sidewalls. The fs laser ablation behaviors were precisely controlled and coordinated to optimize the parameter compensations in general manufacturing applications. The AOI control together with the parameter compensation provides a versatile solution to simultaneously achieve vertical sidewalls as well as sharp edges of entrances and exits for geometries of different shapes and dimensions. Both mm-scale diameters and depths were realized with dimensional precisions below 10µm and surface roughness below 1µm. This research establishes a novel strategy to finely control the fs laser machining process, enabling the fs laser applications in macroscale machining with micro/nanoscale precisions.

 
more » « less
NSF-PAR ID:
10306773
Author(s) / Creator(s):
; ; ; ; ; ; ;
Publisher / Repository:
IOP Publishing
Date Published:
Journal Name:
International Journal of Extreme Manufacturing
Volume:
3
Issue:
4
ISSN:
2631-8644
Page Range / eLocation ID:
Article No. 045001
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. The co-packaging of optics and electronics provides a potential path forward to achieving beyond 50 Tbps top of rack switch packages. In a co-packaged design, the scaling of bandwidth, cost, and energy is governed by the number of optical transceivers (TxRx) per package as opposed to transistor shrink. Due to the large footprint of optical components relative to their electronic counterparts, the vertical stacking of optical TxRx chips in a co-packaged optics design will become a necessity. As a result, development of efficient, dense, and wide alignment tolerance chip-to-chip optical couplers will be an enabling technology for continued TxRx scaling. In this paper, we propose a novel scheme to vertically couple into standard 220 nm silicon on insulator waveguides from 220 nm silicon nitride on glass waveguides using overlapping, inverse double tapers. Simulation results using Lumerical’s 3D Finite Difference Time Domain solver are presented, demonstrating insertion losses below -0.13 dB for an inter-chip spacing of 1µm; 1 dB vertical and lateral alignment tolerances of approximately 2.6µm and ± 2.8µm, respectively; a greater than 300 nm 1 dB bandwidth; and 1 dB twist and tilt tolerances of approximately ± 2.3 degrees and 0.4 degrees, respectively. These results demonstrate the potential of our coupler for use in co-packaged designs requiring high performance, high density, CMOS compatible out of plane optical connections.

     
    more » « less
  2. This paper presents a novel noncontact measurement and inspection method based on knife-edge diffraction theory for corrosive wear propagation monitoring at a sharp edge. The degree of corrosion on the sharp edge was quantitatively traced in process by knife-edge interferometry (KEI). The measurement system consists of a laser diode, an avalanche photodiode, and a linear stage for scanning. KEI utilizes the interferometric fringes projected on the measurement plane when the light is incident on a sharp edge. The corrosion propagation on sharp edges was characterized by analyzing the difference in the two interferometric fringes obtained from the control and measurement groups. By using the cross-correlation algorithm, the corrosion conditions on sharp edges were quantitatively quantified into two factors: lag and similarity for edge loss and edge roughness, respectively. The KEI sensor noise level was estimated at 0.03% in full scale. The computational approach to knife-edge diffraction was validated by experimental validation, and the computational error was evaluated at less than 1%. Two sets of razor blades for measurement and control groups were used. As a result, the lag will be increased at an edge loss ratio of 1.007/µm due to the corrosive wear, while the similarity will be decreased at a ratio of5.4×<#comment/>10−<#comment/>4/µ<#comment/>mwith respect to edge roughness change. Experimental results showed a good agreement with computational results.

     
    more » « less
  3. The energy and beam current dependence of Ga+focused ion beam milling damage on the sidewall of vertical rectifiers fabricated on n-type Ga2O3was investigated with 5–30 kV ions and beam currents from 1.3–20 nA. The sidewall damage was introduced by etching a mesa along one edge of existing Ga2O3rectifiers. We employed on-state resistance, forward and reverse leakage current, Schottky barrier height, and diode ideality factor from the vertical rectifiers as potential measures of the extent of the ion-induced sidewall damage. Rectifiers of different diameters were exposed to the ion beams and the “zero-area” parameters extracted by extrapolating to zero area and normalizing for milling depth. Forward currents degraded with exposure to any of our beam conductions, while reverse current was unaffected. On-state resistance was found to be most sensitive of the device parameters to Ga+beam energy and current. Beam current was the most important parameter in creating sidewall damage. Use of subsequent lower beam energies and currents after an initial 30 kV mill sequence was able to reduce residual damage effects but not to the point of initial lower beam current exposures.

     
    more » « less
  4. Abstract

    Metal‐assisted electrochemical nanoimprinting (Mac‐Imprint) scales the fabrication of micro‐ and nanoscale 3D freeform geometries in silicon and holds the promise to enable novel chip‐scale optics operating at the near‐infrared spectrum. However, Mac‐Imprint of silicon concomitantly generates mesoscale roughness (e.g., protrusion size ≈45 nm) creating prohibitive levels of light scattering. This arises from the requirement to coat stamps with nanoporous gold catalyst that, while sustaining etchant diffusion, imprints its pores (e.g., average diameter ≈42 nm) onto silicon. In this work, roughness is reduced to sub‐10 nm levels, which is in par with plasma etching, by decreasing pore size of the catalyst via dealloying in far‐from equilibrium conditions. At this level, single‐digit nanometric details such as grain‐boundary grooves of the catalyst are imprinted and attributed to the resolution limit of Mac‐Imprint, which is argued to be twice the Debye length (i.e., 1.7 nm)—a finding that broadly applies to metal‐assisted chemical etching. Last, Mac‐Imprint is employed to produce single‐mode rib‐waveguides on pre‐patterned silicon‐on‐insulator wafers with root‐mean‐square line‐edge roughness less than 10 nm while providing depth uniformity (i.e., 42.9 ± 5.5 nm), and limited levels of silicon defect formation (e.g., Raman peak shift < 0.1 cm−1) and sidewall scattering.

     
    more » « less
  5. The patterning of silicon and silicon oxide nanocones onto the surfaces of devices introduces interesting phenomena such as anti-reflection and super-transmissivity. While silicon nanocone formation is well-documented, current techniques to fabricate silicon oxide nanocones either involve complex fabrication procedures, non-deterministic placement, or poor uniformity. Here, we introduce a single-mask dry etching procedure for the fabrication of sharp silicon oxide nanocones with smooth sidewalls and deterministic distribution using electron beam lithography. Silicon oxide films deposited using plasma-enhanced chemical vapor deposition are etched using a thin alumina hard mask of selectivity > 88, enabling high aspect ratio nanocones with smooth sidewalls and arbitrary distribution across the target substrate. We further introduce a novel multi-step dry etching technique to achieve ultra-sharp amorphous silicon oxide nanocones with tip diameters of ~10 nm. The processes presented in this work may have applications in the fabrication of amorphous nanocone arrays onto arbitrary substrates or as nanoscale probes. 
    more » « less