Valls, Javier, Garcia-Herrero, Francisco, Raveendran, Nithin, and Vasic, Bane. Syndrome-Based Min-Sum vs OSD-0 Decoders: FPGA Implementation and Analysis for Quantum LDPC Codes. IEEE Access 9. Web. doi:10.1109/ACCESS.2021.3118544.

Valls, Javier, Garcia-Herrero, Francisco, Raveendran, Nithin, & Vasic, Bane. Syndrome-Based Min-Sum vs OSD-0 Decoders: FPGA Implementation and Analysis for Quantum LDPC Codes. IEEE Access, 9 (). https://doi.org/10.1109/ACCESS.2021.3118544

Valls, Javier, Garcia-Herrero, Francisco, Raveendran, Nithin, and Vasic, Bane. "Syndrome-Based Min-Sum vs OSD-0 Decoders: FPGA Implementation and Analysis for Quantum LDPC Codes". IEEE Access 9 (). Country unknown/Code not available: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ACCESS.2021.3118544. https://par.nsf.gov/biblio/10307889.

@article{osti_10307889,
place = {Country unknown/Code not available}, title = {Syndrome-Based Min-Sum vs OSD-0 Decoders: FPGA Implementation and Analysis for Quantum LDPC Codes}, url = {https://par.nsf.gov/biblio/10307889}, DOI = {10.1109/ACCESS.2021.3118544}, abstractNote = {Not Available}, journal = {IEEE Access}, volume = {9}, publisher = {Institute of Electrical and Electronics Engineers}, author = {Valls, Javier and Garcia-Herrero, Francisco and Raveendran, Nithin and Vasic, Bane}, }