Qu, Zheng, Deng, Lei, Wang, Bangyan, Chen, Hengnu, Lin, Jilan, Liang, Ling, Li, Guoqi, Zhang, Zheng, and Xie, Yuan. Hardware-Enabled Efficient Data Processing with Tensor-Train Decomposition. Retrieved from https://par.nsf.gov/biblio/10310724. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . Web. doi:10.1109/TCAD.2021.3058317.

Qu, Zheng, Deng, Lei, Wang, Bangyan, Chen, Hengnu, Lin, Jilan, Liang, Ling, Li, Guoqi, Zhang, Zheng, & Xie, Yuan. Hardware-Enabled Efficient Data Processing with Tensor-Train Decomposition. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (). Retrieved from https://par.nsf.gov/biblio/10310724. https://doi.org/10.1109/TCAD.2021.3058317

Qu, Zheng, Deng, Lei, Wang, Bangyan, Chen, Hengnu, Lin, Jilan, Liang, Ling, Li, Guoqi, Zhang, Zheng, and Xie, Yuan. "Hardware-Enabled Efficient Data Processing with Tensor-Train Decomposition". IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (). Country unknown/Code not available. https://doi.org/10.1109/TCAD.2021.3058317. https://par.nsf.gov/biblio/10310724.

@article{osti_10310724,
place = {Country unknown/Code not available}, title = {Hardware-Enabled Efficient Data Processing with Tensor-Train Decomposition}, url = {https://par.nsf.gov/biblio/10310724}, DOI = {10.1109/TCAD.2021.3058317}, abstractNote = {}, journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, author = {Qu, Zheng and Deng, Lei and Wang, Bangyan and Chen, Hengnu and Lin, Jilan and Liang, Ling and Li, Guoqi and Zhang, Zheng and Xie, Yuan}, }