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			<titleStmt><title level='a'>Control and Loss Analysis of a Solid State Transformer Based DC Extreme Fast Charger</title></titleStmt>
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				<date>06/21/2021</date>
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					<idno type="par_id">10313566</idno>
					<idno type="doi">10.1109/ITEC51675.2021.9490062</idno>
					<title level='j'>2021 IEEE Transportation Electrification Conference and Expo</title>
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					<author>Garry Jean-Pierre</author><author>Siavash Beheshtaein</author><author>Necmi Altin</author><author>Adel Nasiri</author>
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			<abstract><ab><![CDATA[The increasing demand for electric vehicles, due to advantages such as higher energy efficiency, lower fuel costs, and less vehicle maintenance, is expected to drive the need for electric vehicle charging infrastructure. Due to their reduced size and weight, high power and scalable compact solid state transformers (SST) are growing in popularity. This study presents the total loss analysis and control design for a direct grid connected single-phase SST for a fast charging station. A control strategy to achieve robust current control, DC voltage and power balancing, and power loss minimization (PLM) is implemented for this system. Detailed analyses and simulation results obtained from MATLAB/Simulink are given to prove the effectiveness of the proposed control techniques.]]></ab></abstract>
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<div xmlns="http://www.tei-c.org/ns/1.0"><head>INTRODUCTION</head><p>The increasing number of electric vehicles (EV) create a need for more suitable charging infrastructure and an opportunity to develop charging technology to compete against combustion engine vehicles refueling time. The prominent extreme fast-charging (XFC) technology offers a charge time comparable to the time needed to refuel a traditional combustion engine vehicle. The state-of-the-art DC fast-charging stations are connected from the three-phase 480-V low voltage distribution feeder up to 13-kV medium voltage power grid. This connection is usually achieved with the use of a bulky low frequency transformer, which increases the size and cost of the system. To mitigate this bulky low frequency transformer, the power electronics-based SSTs have been introduced to directly interface the medium voltage grid. This configuration provides numerous advantages, including: more control flexibility, lower footprint, better current control, and higher efficiency <ref type="bibr">[1]</ref>.</p><p>To maximize the performance of the SSTs, the efficiency optimization has been a focal point. Numerous analyses have been presented for each major component of the system. In <ref type="bibr">[2]</ref>, a fundamental duty cycle modulation technique was introduced to decrease the RMS current and improve the efficiency at the wide operating conditions of the dual active bridge (DAB) converter. A digital control method was presented in <ref type="bibr">[3]</ref> to decrease the loss of the DAB under light load. A dual control strategy was implemented in <ref type="bibr">[4]</ref> for improving the performance of the DAB at both light and heavy loading. A new circuit configuration was proposed in <ref type="bibr">[5]</ref> for extending the zero voltage switching (ZVS) range and achieving higher efficiency for the wide operating conditions. However, the size and cost of the converter increased due to the additional half bridge added to the circuit and the maximum efficiency was still under 95%. An optimization and control technique based non-active PLM was introduced in <ref type="bibr">[6]</ref> to increase converter efficiency and achieve ZVS. In <ref type="bibr">[7]</ref>, soft-switching techniques were studied for high power modules of the DAB to minimize converter power loss. A power loss modulation was presented and analyzed in <ref type="bibr">[8]</ref>, using the dual-phase-shift control strategy in order to increase the overall efficiency of the system. The extended-phase-shift control strategy was implemented in <ref type="bibr">[9]</ref> to mitigate the issue of circulating power and improve the efficiency of the converter. Reactive power elimination was formulated in <ref type="bibr">[10]</ref> based on the dual-phase-shift method to decrease the peak current, suppress the reactive power component, and reduce the output capacitance of the converter. RMS current minimization-based triple-phase-shift (TPS) control was presented in <ref type="bibr">[11]</ref> for an input series output parallel (ISOP) DAB converter to improve the performance and increase system efficiency. In order to complete the loss formulation of the DAB converter, the high frequency transformer losses should be taken into consideration. A loss prediction model for non-sinusoidal signals was introduced in <ref type="bibr">[12]</ref> based on Steinmetz variables to formulate the core loss for ferrite core materials.</p><p>In grid-connected inverters and active front-end (AFE) circuits, an effective filter is required in order to decrease the ripple of the output current and current harmonics injected from the grid. To this end, an L-filter, which is a first order filter, was introduced. Although the filter is simple, it had a few disadvantages, including poor harmonic attenuation and dynamic performance, high voltage drops across the inductor, and bulkiness <ref type="bibr">[13]</ref>. The higher-order filters, such as LCL, LCL-LC, LLCL, and trap-filter, present excellent performance with compact size. Due to its simplicity and high performance, the LCL filter has attracted high attention in both academia and industry. The power quality indices dictate the component size of the LCL filter. The inverter side and grid side inductors and the capacitor size are determined based on the desired output current ripple, the attenuation capability at high frequencies, and the maximum generated reactive power at fundamental frequency <ref type="bibr">[14]</ref>. When designing the LCL filter, resonance poses a challenge, as it can harm the system. Either passive and active damping methods, which are based on using resistor/resistors, or a control method can attenuate this issue and increase system robustness and stability <ref type="bibr">[15]</ref>. The design process is iterative and requires consideration of the resonant frequency, the voltage drop, the maximum output current ripple, minimization of the total harmonics distortion (THD) and the damping method <ref type="bibr">[16]</ref>- <ref type="bibr">[18]</ref>. Among the methods proposed, <ref type="bibr">[17]</ref> was chosen for the LCL filter design, as it offers a systematic design methodology that meets industrial requirements and limits THD to a specific value.</p><p>Designing the cascaded H-bridge multilevel (CHBML) AFE converter to maximize the efficiency of the SST is dependent upon the control algorithm applied. A loss analysis was presented in <ref type="bibr">[19]</ref> for a CHBML inverter to study its benefit in large scale PV systems. In <ref type="bibr">[20]</ref>, a loss comparison analysis was studied to present a methodology for selecting the number of cells that can be used in a cascaded H-bridge.</p><p>In this study, a power stage which is compose of a CHBML AFE and an ISOP DAB DC-DC converter is proposed for extreme fast charging stations. While advanced control schemes are proposed for power converter stages, the total loss of the system is minimized. The loss analysis was performed, and the loss was broken down into three main sections: the LCL filter losses, the AFE losses, and the DAB converter losses. In addition, an optimization study was performed to minimize the DAB converter losses. The performance of the system was validated with analytical results and MATLAB/Simulink simulation results.</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>II. DC FAST CHARGER CONVERTER MODELING</head><p>Fig. <ref type="figure">1</ref> shows a single-phase SST. Its configuration consists of a CHBML-AFE converter and a modular ISOP DAB DC-DC converter with high-frequency transformers. The system is connected to the utility grid through the LCL filter. The CHBML-AFE and the LCL filter provide interconnection between the utility grid and the regulated DC link. Input AC current and DC link regulation are designed to maintain high power quality and low THD. The isolated ISOP DC-DC converter interfaces the battery energy storage unit or the electrical vehicles, and provides compact, integrated and galvanic isolated nodes for the loads. In order to guarantee optimum system operation, the governing equations of the SST are formulated to implement the control and perform the loss analyses. Equations ( <ref type="formula">1</ref>)-( <ref type="formula">5</ref>) model the CHBML-AFE with LCL filter, and equations ( <ref type="formula">6</ref>)-( <ref type="formula">7</ref>) describe the average power transfer and the RMS current of the ISOP DAB with TPS method.</p><p>Fig. <ref type="figure">1</ref> The single-phase SST</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>I. DC FAST CHARGER CONVERTER LOSS ANALYSIS</head><p>In order to ensure the highest efficiency of the system, even under light load conditions, the total power loss for the major passive and active components is analyzed for the LCL filter, CHBML-AFE and the ISOP DAB. Analytical expressions of the DAB converter under TPS control for PLM in different operating zones are formulated. The particle swam optimization (PSO) and the Lagrange Multiplier (LM) were used in order to obtain either the numeric value or a closed form expression for the optimal duty cycles that enable the DAB converter to operate with minimized power loss for each power zone.</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>A. AFE Converter Loss Analysis</head><p>The CHBML-AFE power losses are formulated based on the conduction and switching losses. Conduction losses in power MOSFET can be formulated using the MOSFETapproximated drain-source on-state resistance. The conduction loss of the anti-parallel diode is also formulated to obtain the total conduction losses. RDS is the on-state resistance and Vdo is the diode voltage drop. Taking into consideration the inverter side inductance current oscillation and the switching operation mode, the conduction and switching power losses are obtained, as in ( <ref type="formula">8</ref>) and ( <ref type="formula">9</ref>) <ref type="bibr">[21]</ref> and <ref type="bibr">[22]</ref>.</p><p>Eon, EOFF, Qrr, Vd, fsw, and Ncell are the turn-on and turn-off energy of the selected semiconductor, the reverse recovery charge of the diode, the capacitor voltage of each cell, the switching frequency, and the number of cells, respectively. &#916;ib can be calculated as follows:</p><p>where Lb is the summation of the grid side and inverter inductances. The maximum current ripple can be found at u=0.5/Ncell as:</p><p>u is the modulation index. The complete derivation can be found in <ref type="bibr">[23]</ref>.</p><p>is the correction from the voltage balancing.</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>B. LCL Filter Loss Analysis</head><p>The filter power losses are formulated based on the copper and core losses of the inductors, and the ESR loss of the capacitor. ( <ref type="formula">13</ref>) defines the copper loss:</p><p>where Rcu-LCL is the summation of the grid side and inverter winding resistances. The filter core loss of each inductor of the LCL filter is calculated based on the Steinmetz Equation as:</p><p>where Kc, x, and y are the parameters of the chosen magnetic material. L, Ae, and Ve are the inductance, the effective crosssection of the air, and the volume of the magnetic core, respectively. NL is the number of inductor turns. The ESR loss is formulated in <ref type="bibr">(15)</ref>. ic is derived from (3).</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>= (15)</head><p>The total loss of the AC-DC power stage can be computed as the summation of the CHBML-AFE losses and the filter losses, as formulated in <ref type="bibr">(16)</ref>.</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>C. DAB Converter Analysis</head><p>To formulate the total power loss of the DAB using the TPS control modulation scheme, three operating zones are defined as zone 1 (0&#8804; D2 &#8804; D3 &#8804; D1 &#8804;1), zone 2 (0&#8804; D2 &#8804; D1 &#8804; D3 &#8804;1), and zone 3 (0 &#8804; D1 &#8804; D2 &#8804; D3 &#8804;1), which correspond to low, medium and high power regions, respectively <ref type="bibr">[24]</ref>. The DAB converter total loss expression is formulated in terms of the losses of the semiconductor devices (conduction and switching losses) and the high frequency transformer losses (winding and core losses). There are two operational modes in which the DAB can operate: hard-switching and softswitching. Establishment of the ZVS constraint occurs when the zero crossing of il is within the time interval where V1 and V2 have opposite polarities. Under soft-switching operation, turn-off losses are calculated. Under hard-switching operation, both turn-off and turn-on losses are calculated. The four considered loss equations for zone 3 for the DAB converter are formulated in ( <ref type="formula">16</ref>)-( <ref type="formula">19</ref>); for the other zones of operation refer to <ref type="bibr">[24]</ref>. </p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>D. DAB Optimization Trajectories</head><p>To achieve the highest efficiency for the DAB converter, the objective function for the optimization process is formulated, as in <ref type="bibr">(21)</ref>, where the total loss is the sum of the four loss components, as defined in ( <ref type="formula">17</ref>)-( <ref type="formula">20</ref>), for any given average power. Two optimization methods are defined to optimize the efficiency of the DAB. The LM is used to obtain the closed form expressions, as formulated in ( <ref type="formula">22</ref>) and ( <ref type="formula">23</ref>), and the off line PSO is used to obtain a look-up table (LUT) for the optimal control variables that optimize the efficiency. The optimal trajectories for the TPS variables, D1, D2, and &#966;, are shown in Fig. <ref type="figure">2(c</ref>). Fig. <ref type="figure">2(a)</ref> and<ref type="figure">(b)</ref> show the trend in loss and efficiency based on the average power transfer for the DAB converter. Fig. <ref type="figure">2(d</ref>) demonstrates the percentage of loss that occurs for each component of the converter, where the switching loss constitutes the major source of loss in the system. =</p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>II. CONTROL STRUCTURE</head><p>The proposed control scheme for the CHBML-AFE contains three main parts: the generation of the grid current reference, the modified Lyapunov Function (LF)-based control method, and the output bus voltage balancing control. The grid reference current is obtained by summing the output voltages and dividing that result by the number of DC buses present in the CHBML-AFE to obtain the average DC voltage value. This average voltage is taken as the reference value and is regulated by the PI controller. By multiplying the output of the PI controller and the unit sine wave, which is synchronized with the grid voltage and frequency and generated by the PLL unit, the reference signal for the grid current is generated. This reference current is then fed to the proportional resonant (PR) controller block to produce the final reference for the modified LF control block. A conventional LF-based controller is modified with additional capacitor voltage feedback. Details on the controller design can be found in <ref type="bibr">[23]</ref>. In addition to the based control with an additional capacitor voltage loop and PR controller, a voltage balance controller is also applied to balance the cell voltages of the CHBML-AFE. The goal of this voltage balance controller is to remove possible unbalanced voltage conditions for situations where mismatched parameters occur or different loads are applied to the cells of CHBML-AFE. A PI controller regulates the output DC voltage of each cell. The PI output is multiplied by the reference sine wave (the output of the PLL) to generate the perturbed duty cycles. These are added to the switching control, which is generated by the modified LF block <ref type="bibr">[23]</ref>.</p><p>The optimal closed loop control for the ISOP DAB converter is shown in Fig. <ref type="figure">4</ref>. This figure depicts both the buck and boost operation modes of the ISOP DAB converter. The voltage PI controller generates the initial phase-shift &#966;i. In order to estimate the average power transferred from the primary to the secondary bridge, &#966;i is applied in the optimal control variable generation block. The operating zone is then determined according to the estimated average power. The optimal D1opt and D2opt are calculated either from ( <ref type="formula">21</ref>) and <ref type="bibr">(22)</ref> or are chosen from the PSO LUT for the other operating zones <ref type="bibr">[24]</ref>. </p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>III. SIMULATION RESULTS</head><p>In this study, a single-phase three-cell SST was simulated in MATLAB/Simulink to validate the proposed control schemes. Table <ref type="table">I</ref> contains the parameters of the system. The design of the proposed configuration utilizes 277V grid voltage and generates 170V DC bus voltage per module to establish the DC-link for the ISOP DAB converter, which in turn generates 400V output. To validate the proposed strategy, different power loadings are introduced.  The THD is 1.60% for the lowest power operation (0-2s), as seen in Fig. <ref type="figure">5</ref>, and is 0.8% for the other two power levels. Fig. <ref type="figure">6</ref> -Fig. <ref type="figure">8</ref> show the performance of a single DAB converter in the ISOP system. The TPS control can be seen in the shape of the primary and secondary voltages of the high frequency transformer from Fig. <ref type="figure">6</ref> for the highest power region. This figure also shows the tracking accuracy of the DAB converter output voltage. In order to validate the efficiency technique for the DAB converter, the single-phase shift (SPS) method is compared to the TPS method. Fig. <ref type="figure">7</ref> and Fig. <ref type="figure">8</ref> show these two cases. In Fig. <ref type="figure">7</ref>, the TPS method is used; Fig. <ref type="figure">8</ref> shows the performance of the DAB under the SPS method. For the same power level and voltage rating, it can be seen that the applied control strategy provides higher efficiency, as expected, from the analytical results from Fig.   </p></div>
<div xmlns="http://www.tei-c.org/ns/1.0"><head>IV. CONCLUSION</head><p>This paper has presented a control scheme and loss analysis for an extreme fast charger converter. The modified LF-based controller is applied for the CHBML-AFE. The TPS technique is employed in the ISOP DAB DC-DC converter. An optimization method is applied using the TPS modulation strategy in order to minimize the total power loss of the ISOP DAB. The employed control method provides low THD, even at low power, and keeps the grid current sinusoidal and in phase with the grid voltage. The efficiency of the system is greatly improved compared to the SPS method, especially at low loads. The loss breakdown of the system is also presented.</p></div><note xmlns="http://www.tei-c.org/ns/1.0" place="foot" xml:id="foot_0"><p>978-1-7281-7583-6/21/$31.00 &#169;2021 IEEE 2021 IEEE Transportation Electrification Conference &amp; Expo (ITEC) | 978-1-7281-7583-6/21/$31.00 &#169;2021 IEEE | DOI: 10.1109/ITEC51675.2021.9490062 Authorized licensed use limited to: UNIV OF WISCONSIN -MILWAUKEE. Downloaded on January 18,2022 at 21:57:02 UTC from IEEE Xplore. Restrictions apply.</p></note>
			<note xmlns="http://www.tei-c.org/ns/1.0" place="foot" xml:id="foot_1"><p>Authorized licensed use limited to: UNIV OF WISCONSIN -MILWAUKEE. Downloaded on January 18,2022 at 21:57:02 UTC from IEEE Xplore. Restrictions apply.</p></note>
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