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Title: VLSI Hardware Architecture of Stochastic Low-rank Tensor Decomposition
Award ID(s):
2024058 1808159
PAR ID:
10348773
Author(s) / Creator(s):
; ; ; ;
Date Published:
Journal Name:
Asilomar 2021
Page Range / eLocation ID:
1176 to 1180
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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