The desire for cost-effective strategies for producing organic electronic devices has led to many new methods for the organic semiconductor layer deposition; however, manufacturing contacts remains an expensive technique due to the high cost of both the materials used and the processing necessary for their patterning. In this work, we present a method for contact deposition and patterning, which overcomes these limitations and allows fabrication of all-printed organic thin-film transistors on paper. The method relies on depositing contacts using aerosol spray and patterning them with a digitally printed mask from an office laser printer, at ambient temperature and pressure. This technique, which we have denoted aerosol spray laser lithography, is cost-effective and extremely versatile in terms of material choice and electrode geometry. As the processing temperature does not exceed 155 °C, it is compatible with a variety of substrates, including plastic or paper. The success of this method marks an opportunity for a rapid, scalable, and low-cost alternative to current electrode-manufacturing techniques for development of flexible, large-area, electronic applications.
A 12‐h hands‐on processing protocol for a nanofabrication lab module is developed with the intention of teaching high school to college undergraduate students major fabrication techniques. The nanofabrication techniques employed are thin film deposition, direct‐write lithography, conventional UV lithography with a mask aligner, etch, dicing, and characterization. The lab module protocol concludes with the student fabricating their own microletter silicon chip with a personalized message with letters and images through hands‐on processing. For academic discussion, the light interference in thin film, deposition and etch rate, and etch selectivity are studied during the lab module.
more » « less- PAR ID:
- 10367251
- Publisher / Repository:
- Wiley Blackwell (John Wiley & Sons)
- Date Published:
- Journal Name:
- Journal of the Society for Information Display
- Volume:
- 31
- Issue:
- 2
- ISSN:
- 1071-0922
- Page Range / eLocation ID:
- p. 70-76
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
-
more » « less
Abstract -
Abstract Traditional photonic structures such as photonic crystals utilize (a) large arrays of small features with the same size and pitch and (b) a small number of larger features such as diffraction outcouplers. In conventional nanofabrication, separate lithography and etch steps are used for small and large features in order to employ process parameters that lead to optimal pattern transfer and side-wall profiles for each feature-size category, thereby overcoming challenges associated with reactive ion etching lag. This approach cannot be scaled to more complex photonic structures such as those emerging from inverse design protocols. Those structures include features with a large range of sizes such that no distinction between small and large can be made. We develop a sleeve and bulk etch protocol that can be employed to simultaneously pattern features over a wide range of sizes while preserving the desired pattern transfer fidelity and sidewall profiles. This approach reduces the time required to develop a robust process flow, simplifies the fabrication of devices with wider ranges of feature sizes, and enables the fabrication of devices with increasingly complex structure.more » « less
-
more » « less
Abstract Semiconductor nanowire (NW) quantum devices offer a promising path for the pursuit and investigation of topologically-protected quantum states, and superconducting and spin-based qubits that can be controlled using electric fields. Theoretical investigations into the impact of disorder on the attainment of dependable topological states in semiconducting nanowires with large spin–orbit coupling and
g -factor highlight the critical need for improvements in both growth processes and nanofabrication techniques. In this work, we used a hybrid lithography tool for both the high-resolution thermal scanning probe lithography and high-throughput direct laser writing of quantum devices based on thin InSb nanowires with contact spacing of 200 nm. Electrical characterization demonstrates quasi-ballistic transport. The methodology outlined in this study has the potential to reduce the impact of disorder caused by fabrication processes in quantum devices based on 1D semiconductors. -
null (Ed.)Boron-rich B-C compounds with high hardness have been recently synthesized by the chemical vapor deposition (CVD) method. In this paper, we present our successful efforts in the selective growth of microstructures of boron-carbon compounds on silicon substrates. This was achieved by combining microfabrication techniques such as maskless lithography and sputter deposition with the CVD technique. Our characterization studies on these B-C microstructures showed that they maintain structural and mechanical properties similar to that of their thin-film counterparts. The methodology presented here paves the way for the development of microstructures for microelectromechanical system (MEMS) applications which require custom hardness and strength properties. These hard B-C microstructures are an excellent choice as support structures in MEMS-based devices.more » « less
-
more » « less
Low-temperature plasmas (LTPs) are essential to manufacturing devices in the semiconductor industry, from creating extreme ultraviolet photons used in the most advanced lithography to thin film etching, deposition, and surface modifications. It is estimated that 40%–45% of all process steps needed to manufacture semiconductor devices use LTPs in one form or another. LTPs have been an enabling technology in the multidecade progression of the shrinking of device dimensions, often referred to as Moore’s law. New challenges in circuit and device design, novel materials, and increasing demands to achieve environmentally benign processing technologies require advances in plasma technology beyond the current state-of-the-art. The Department of Energy Office of Science Fusion Energy Sciences held a workshop titled Plasma Science for Microelectronics Nanofabrication in August 2022 to discuss the plasma science challenges and technical barriers that need to be overcome to continue to develop the innovative plasma technologies required to support and advance the semiconductor industry. One of the key outcomes of the workshop was identifying a set of priority research opportunities (PROs) to focus attention on the most strategic plasma science challenges to address to benefit the semiconductor industry. For each PRO, scientific challenges and recommended strategies to address those challenges were identified. This article summarizes the PROs identified by the workshop participants.
