Recent technology development of logic devices based on 2-D semiconductors such as MoS2, WS2, and WSe2 has triggered great excitement, paving the way to practical applications. Making low-resistance p-type contacts to 2-D semiconductors remains a critical challenge. The key to addressing this challenge is to find high-work function metallic materials which also introduce minimal metal-induced gap states (MIGSs) at the metal/semiconductor interface. In this work, we perform a systematic computational screening of novel metallic materials and their heterojunctions with monolayer WSe2 based on ab initio density functional theory and quantum device simulations. Two contact strategies, van der Waals (vdW) metallic contact and bulk semimetallic contact, are identified as promising solutions to achieving Schottky-barrier-free and low-contact-resistance p-type contacts for WSe2 p-type field-effect transistor (pFETs). Good candidates of p-type contact materials are found based on our screening criteria, including 1H-NbS2, 1H-TaS2, and 1T-TiS2 in the vdW metal category, as well as Co3Sn2S2 and TaP in the bulk semimetal category. Simulations of these new p-type contact materials suggest reduced MIGS, less Fermi-level pinning effect, negligible Schottky barrier height and small contact resistance (down to 20 Ωμm )
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Multiscale modeling of semimetal contact to two-dimensional transition metal dichalcogenide semiconductor
A multiscale simulation approach is developed to simulate the contact transport properties between semimetal and a monolayer two-dimensional transition metal dichalcogenide (TMDC) semiconductor. The results elucidate the mechanisms for low contact resistance between semimetal and TMDC semiconductor contacts from a quantum transport perspective. The simulation results compare favorably with recent experiments. Furthermore, the results show that the contact resistance of a bismuth-MoS2contact can be further reduced by engineering the dielectric environment and doping the TMDC material to [Formula: see text]. The quantum transport simulation indicates the possibility to achieve an ultrashort contact transfer length of ∼1 nm, which can allow aggressive scaling of the contact size.
more » « less- NSF-PAR ID:
- 10369010
- Publisher / Repository:
- American Institute of Physics
- Date Published:
- Journal Name:
- Applied Physics Letters
- Volume:
- 121
- Issue:
- 2
- ISSN:
- 0003-6951
- Page Range / eLocation ID:
- Article No. 023507
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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Atomically thin 2D transition metal dichalcogenides (TMDs), such as MoS2, are promising candidates for nanoscale photonics because of strong light–matter interactions. However, Fermi‐level pinning due to metal‐induced gap states (MIGS) at the metal–monolayer (1L)‐MoS2interface limits the application of optoelectronic devices based on conventional metals due to high contact resistance. On the other hand, a semimetal–TMD–semimetal device can overcome this limitation, where the MIGS are sufficiently suppressed allowing ohmic contacts. Herein, the optoelectronic performance of a bismuth–1L‐MoS2–bismuth device with ohmic electrical contacts and extraordinary optoelectronic properties is demonstrated. To address the wafer‐scale production, full coverage 1L‐MoS2grown by chemical vapor deposition. High photoresponsivity of 300 A W−1at wavelength 400 nm measured at 77 K, which translates into an external quantum efficiency (EQE) ≈1000 or 105%, is measured. The 90% rise time of the devices at 77 K is 0.1 ms, suggesting they can operate at the speed of ≈10 kHz. High‐performance broadband photodetector with spectral coverage ranging from 380 to 1000 nm is demonstrated. The combination of large‐array device fabrication, high sensitivity, and high‐speed response offers great potential for applications in photonics, including integrated optoelectronic circuits.
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Abstract This paper provides comprehensive experimental analysis relating to improvements in the two-dimensional (2D) p-type metal–oxide–semiconductor (PMOS) field effect transistors (FETs) by pure van der Waals (vdW) contacts on few-layer tungsten diselenide (WSe2) with high-k metal gate (HKMG) stacks. Our analysis shows that standard metallization techniques (e.g., e-beam evaporation at moderate pressure ~ 10–5 torr) results in significant Fermi-level pinning, but Schottky barrier heights (SBH) remain small (< 100 meV) when using high work function metals (e.g., Pt or Pd). Temperature-dependent analysis uncovers a more dominant contribution to contact resistance from the channel access region and confirms significant improvement through less damaging metallization techniques (i.e., reduced scattering) combined with strongly scaled HKMG stacks (enhanced carrier density). A clean contact/channel interface is achieved through high-vacuum evaporation and temperature-controlled stepped deposition providing large improvements in contact resistance. Our study reports low contact resistance of 5.7 kΩ-µm, with on-state currents of ~ 97 µA/µm and subthreshold swing of ~ 140 mV/dec in FETs with channel lengths of 400 nm. Furthermore, theoretical analysis using a Landauer transport ballistic model for WSe2SB-FETs elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance (excellent on-state current vs subthreshold swing benchmarks) towards the ultimate CMOS scaling limit.
