Zogbi, Nicholas, Liu, Samuel, Bennett, Christopher H., Agarwal, Sapan, Marinella, Matthew J., Incorvia, Jean Anne C., and Xiao, T. Patrick. Parallel Matrix Multiplication Using Voltage-Controlled Magnetic Anisotropy Domain Wall Logic. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 9.1 Web. doi:10.1109/JXCDC.2023.3266441.

Zogbi, Nicholas, Liu, Samuel, Bennett, Christopher H., Agarwal, Sapan, Marinella, Matthew J., Incorvia, Jean Anne C., & Xiao, T. Patrick. Parallel Matrix Multiplication Using Voltage-Controlled Magnetic Anisotropy Domain Wall Logic. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 9 (1). https://doi.org/10.1109/JXCDC.2023.3266441

Zogbi, Nicholas, Liu, Samuel, Bennett, Christopher H., Agarwal, Sapan, Marinella, Matthew J., Incorvia, Jean Anne C., and Xiao, T. Patrick. "Parallel Matrix Multiplication Using Voltage-Controlled Magnetic Anisotropy Domain Wall Logic". IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 9 (1). Country unknown/Code not available: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/JXCDC.2023.3266441. https://par.nsf.gov/biblio/10421048.

@article{osti_10421048,
place = {Country unknown/Code not available}, title = {Parallel Matrix Multiplication Using Voltage-Controlled Magnetic Anisotropy Domain Wall Logic}, url = {https://par.nsf.gov/biblio/10421048}, DOI = {10.1109/JXCDC.2023.3266441}, abstractNote = {Not Available}, journal = {IEEE Journal on Exploratory Solid-State Computational Devices and Circuits}, volume = {9}, number = {1}, publisher = {Institute of Electrical and Electronics Engineers}, author = {Zogbi, Nicholas and Liu, Samuel and Bennett, Christopher H. and Agarwal, Sapan and Marinella, Matthew J. and Incorvia, Jean Anne C. and Xiao, T. Patrick}, }