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Title: Design Automation of Series Resonance Clocking in 14-nm FinFETs
Award ID(s):
2138253
PAR ID:
10485163
Author(s) / Creator(s):
; ;
Publisher / Repository:
Springer
Date Published:
Journal Name:
Circuits, Systems, and Signal Processing
Volume:
42
Issue:
12
ISSN:
0278-081X
Page Range / eLocation ID:
7549 to 7579
Subject(s) / Keyword(s):
Clock skew · LC resonance · Clock tree architecture · Pulsed flip-flops · Power consumption
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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