An official website of the United States government
This study presents a comprehensive analysis of the etching effects on β-Ga2O3 using two methods: H2_N2 (a mixture of hydrogen and nitrogen) etching and triethylgallium (TEGa) in situ etching performed in a metal-organic chemical vapor deposition system. By employing a mix of H2 and N2 gases at varying chamber pressures and maintaining a constant etching temperature of 750 °C, we investigated the etching dynamics across three different β-Ga2O3 orientations: (010), (001), and (2¯01). Field emission scanning electron microscopy analysis showed that the etching behavior of β-Ga2O3 depends on the crystal orientation, with the (010) orientation showing notably uniform and smooth surfaces, indicating its suitability for vertical device applications. High-aspect-ratio β-Ga2O3 fin arrays were fabricated on (010) substrates using H2_N2 etching, yielding fin structures with widths of 2 μm and depths of 3.1 μm, along with smooth and well-defined sidewalls. The etching process achieved exceptionally high etch rates (>18 μm/h) with a strong dependence on pressure and sidewall orientation, revealing the trade-off between etch depth and surface smoothness. Separately, TEGa in situ etching was investigated as an alternative etching technique for both β-Ga2O3 and β-(AlxGa1−x)2O3 films. The results revealed that the (010) orientation exhibited relatively high etching rates while maintaining smoother sidewalls and top surfaces, making it favorable for device processing. In contrast, the (001) orientation showed strong resistance to TEGa etching. Furthermore, Al-incorporated β-(AlxGa1−x)2O3 films showed substantially lower etch rates compared to pure β-Ga2O3, suggesting their potential use as an effective etch-stop layer in advanced device fabrication.
more »
« less
Smooth and Vertical Sidewall Formation for AlGaN-Based Electronic and Optoelectronic Devices
We report a two-step etching process involving inductively coupled plasma (ICP) etching followed by wet chemical etching to achieve smooth and vertical sidewalls, being beneficial for AlGaN-based electronic and optoelectronic devices. The influence of ICP power on the roughness of etched sidewalls is investigated. It is observed that ICP etching alone does not produce smooth sidewalls, necessitating subsequent wet chemical etching using tetramethyl ammonium hydroxide (TMAH) to enhance sidewall smoothness and reduce tilt angle. The morphological evolution of the etched sidewalls with wet etch time for the device structures is also thoroughly investigated. Consistent etch results are achieved for AlxGa1-xN alloys with Al compositions up to 70%, indicating the effectiveness of our etching process.
more »
« less
- Award ID(s):
- 2011876
- PAR ID:
- 10537100
- Publisher / Repository:
- The Electrochemical Society
- Date Published:
- Journal Name:
- ECS Journal of Solid State Science and Technology
- Volume:
- 13
- Issue:
- 8
- ISSN:
- 2162-8769
- Format(s):
- Medium: X Size: Article No. 084006
- Size(s):
- Article No. 084006
- Sponsoring Org:
- National Science Foundation
More Like this
-
-
In this work, we report on the anisotropic etching characteristics of β-Ga2O3 using triethylgallium (TEGa) performed in situ within an MOCVD chamber. At sufficiently high substrate temperatures, TEGa can act as a strong etchant for β-Ga2O3 utilizing the suboxide reaction between Ga and Ga2O3 [4 Ga(s) + Ga2O3 (s) → 3Ga2O (g)]. We observe that due to the monoclinic crystal structure of β-Ga2O3, TEGa etching on both (010) and (001) substrates is highly anisotropic in nature, in terms of both sidewall roughness and lateral etch rate. Smooth sidewalls are only obtained along crystal orientations that minimize sidewall surface energy. Utilizing this technique, we also demonstrate deep sub-micrometer fins with smooth sidewalls and high aspect ratios. Furthermore, we also demonstrate the damage-free nature of TEGa etching by fabricating Schottky diodes on the etched surface, which display no change in the net donor concentration.more » « less
-
This work demonstrates an in situ etching technique for β-Ga2O3 using solid-source metallic gallium (Ga) in a low-pressure chemical vapor deposition (LPCVD) system, enabling clean, anisotropic, plasma damage-free etching. Etching behavior was systematically studied on (2¯01) β-Ga2O3 films and patterned (010) β-Ga2O3 substrates as a function of temperature (1000–1100 °C), Ar carrier gas flow (80–400 sccm) and Ga source-to-substrate distance (1–5 cm). The process exhibits vapor transport- and surface-reaction-limited behavior, with etch rates reaching a maximum of ∼2.25 µm/h on (010) substrates at 1050 °C and 2 cm spacing. Etch rates decrease sharply with increasing source-to-substrate distance due to reduced Ga vapor availability, while elevated temperatures enhance surface reaction kinetics through increased Ga reactivity and suboxide formation, leading to enhanced etch rates. In-plane anisotropy studies using radial trench patterns reveal that the (100) orientation produces the most stable etch front, characterized by smooth, vertical sidewalls and minimal lateral etching, consistent with its lowest surface free energy. In contrast, orientations such as (101), which possess higher surface energy, exhibit pronounced lateral etching and micro-faceting. As the trench orientation progressively deviates from (100), lateral etching increases. Facet evolution is observed between (100) and (1¯02), where stepped sidewalls composed of alternating (100) and (1¯02) segments progressively transition into a single inclined facet, which stabilizes along (100) or (1¯02) depending on the trench orientation. The (100)-aligned fins exhibit minimal bottom curvature, while (201)-aligned structures display increased under-etching and trench rounding. Collectively, these findings establish LPCVD-based in situ etching as a scalable, damage-free, and orientation-selective technique for fabricating high-aspect-ratio β-Ga2O3 3D structures in next-generation power devices.more » « less
-
Lithium niobate (LiNbO3, LN) is a ferroelectric crystal of interest for integrated photonics owing to its large second-order optical nonlinearity and the ability to impart periodic poling via an external electric field. However, on-chip device performance based on thin-film lithium niobate (TFLN) is presently limited by propagation losses arising from surface roughness and corrugations. Atomic layer etching (ALE) could potentially smooth these features and thereby increase photonic performance, but no ALE process has been reported for LN. Here, we report an isotropic ALE process for x-cut MgO-doped LN using sequential exposures of H2 and SF6/Ar plasmas. We observe an etch rate of 1.59±0.02 nm/cycle with a synergy of 96.9%. We also demonstrate that ALE can be achieved with SF6/O2 or Cl2/BCl3 plasma exposures in place of the SF6/Ar plasma step with synergies of 99.5% and 91.5%, respectively. The process is found to decrease the sidewall surface roughness of TFLN waveguides etched by physical Ar+ milling by 30% without additional wet processing. Our ALE process could be used to smooth sidewall surfaces of TFLN waveguides as a postprocessing treatment, thereby increasing the performance of TFLN nanophotonic devices and enabling new integrated photonic device capabilities.more » « less
-
III-Nitride light-emitting diodes (LEDs) and laser diodes (LDs) are light sources covering ultraviolet (UV) and visible spectral regimes, which offer benefits including compact size, wavelength tuning, long lifetime, and sustainability. UV light sources have a range of applications in the fields of biology and medicine, such as sterilization and the purification of both water and air, where visible light emitters have been used in miniaturized photonic devices for optogenetic applications and other light-based therapies. Those III-Nitride light sources provide tremendous potential to be integrated with silicon (Si)-based lab-on-a-chip (LOC) technology, which typically requires the coupling of an external light source through fiber optic cable, limiting the field deployment of the devices. Integrating an on-chip III-Nitride light source with these devices opens the door to complete LOC technology, allowing for the simultaneous detection of multiple bio agents on a single platform without the need for external photonic sources. While most integrated microsystems still rely on wafer bonding at the device or wafer level, one promising method to achieve the integration of III-nitride UV and visible LEDs and LDs with conventional Si photonics and complementary metal-oxide-semiconductor (CMOS) platforms is through the use of micro-transfer printing (µTP). µTP has greater tolerances in alignment than techniques such as flip-chip integration and allows for the transfer of many devices at once. Additionally, the µTP process does not call for the complex and high temperature processing required for standard wafer bonding or necessitate complicated growth and lattice matching needed for monolithic integration. To enable µTP, an elastomeric, such as polydimethylsiloxane (PDMS), is utilized to create a transfer stamp that is employed for the precise selection of fabricated semiconductor devices for transfer from a source wafer to a target wafer. III-Nitride LEDs or LDs epitaxial structures are grown on a source wafer and fabricated through the creation of tethered coupons, or individual devices. This is accomplished by utilizing III-nitride materials grown on (111) Si. These devices can be fabricated through standard lithography and etching processes, etching down to the (111) Si substrate. A larger mesa can be patterned and etched into the Si substrate, exposing the sidewalls for wet chemical etching. The finished devices are then encapsulated in SiNxthrough plasma enhanced chemical vapor deposition (PECVD), which is patterned through standard lithography to define tethers and anchors for the subsequent wet etch. The fabricated devices are oriented in such a way as to take advantage of the difference in etch rates (>100x) of Si(110) and Si(111) in potassium hydroxide (KOH), where etching proceeds along the <110> direction. After KOH etching, the devices are left encapsulated in SiNxand suspended over the silicon substrate with an air gap, while the anchors and tethers are left largely unaffected.This enables the elastomer stamp to press down, breaking the tethers, and releasing the device. The stamp is then able to transfer the device to a target wafer that has been coated and patterned with InterVia, a spin-on dielectric material that acts as an adhesion layer. The stamp is pressed into the target wafer in such a way that the device is adhered to the target and released from the elastomer stamp. This technique can be applied to LEDs and LDs grown on (111) Si, allowing for the heterogeneous integration of III-nitride LED and LDs with conventional CMOS and Si photonic integrated circuits (PICs) as on-chip light sources, opening the door to complete LOC technology without the need for additional external photonic sources.more » « less
