In both measurements, the other gate is held at ground. d, R xx as a function of V b at several selected temperatures. Each curve is taken with V t = 0. e-f, Maps of R xx as a function of both V t and V b , where V b is swept from negative to positive (e) or from positive to negative (f ). The maps are taken by sweeping V b as the fast axis and V t as the slow axis (negative to positive). The arrows show the relevant gate sweeping directions, where data is collected only for the sweeps corresponding to solid arrows. The stars indicate the starting point of the measurement.

under the right conditions hBN can act as an effectively ideal dielectric.

Recently, however, a dramatic and peculiar kind of gate hysteresis has been reported in a number of individual vdW FET devices. [7][8][9][10][11][12][13][14][15][16] In many of these devices, the channel is Bernalstacked bilayer graphene in which one of the encapsulating hBN flakes is in close rotational alignment with the graphene. 7,8,12,17 However, similar behavior has also been reported in devices when the channel is magic-angle twisted bilayer graphene, 10,16 twisted double bilayer graphene, 14 and even in devices consisting of two graphene layers separated by monolayer hBN. 9 Common factors to all reported instances of the phenomenon are that it is mostly associated with a single gate; that it is approximately symmetric about zero gate voltage; and that it is typically an "all or nothing" effect, in that it is either large or completely absent (though there have been instances of weak hysteresis of a possibly different nature).

The most puzzling common feature, however, is the combination of behaviors referred to as the "gate doesn't work" (GDW) and "electron ratchet" effects. 7,12 As the gate voltage is swept the resistance is nearly constant over some range (i.e., the GDW effect), but eventually starts to change and sweeps out the anticipated transfer curve of the device. If the sweep direction is then reversed, no matter at what point, the resistance stops changing once again (i.e., the electron ratchet effect). This peculiar behavior has prompted theoretical explanations ranging from exotic correlated electron effects to interlayer sliding ferroelectric mechanisms. 7,8,12,[14][15][16] We first examine a device with a channel of 24-layer thick graphite, comprising two 12layer Bernal-stacked flakes stacked on each other with a twist angle of 1.21 • (Fig. 1a). As usual, the channel is encapsulated above and below with hBN, and the entire structure is surrounded by graphite top and bottom gates. Figures 1b-c show measurements of the fourterminal resistance, R xx , at a temperature of 1.7 K as a function of the voltage on the top gate, V t , and bottom gate, V b . Electric fields being key, we divide each gate voltage by the thickness of the respective hBN. On sweeping V t up and down at fixed V b (Fig. 1b), we see a resistance peak feature near V t = 0 with negligible hysteresis. There is a similar resistance peak for the same measurement made with V b , but in this case there is large hysteresis and the peak is offset from V b = 0 by an amount ∆V b ≈ 8.5 V. The offset is roughly equal and opposite in the two sweep directions, and nearly independent of the sweep speed. The value of ∆V b /d b ≈ 0.15 V/nm is a large fraction of the typical breakdown field of hBN, and the full width of the hysteresis region corresponds to a nominal capacitive change in the carrier density of the bottom accumulation layer of ≈ 7 × 10 12 cm -2 (see Supporting Information).

The GDW effect is exemplified by the regions in Fig. 1c where sweeping V b in one direction appears to have no effect on the resistance, implying that no free carriers are accumulating in the channel. Figure 1d shows that the size of ∆V b barely changes at temperatures up to 200 K, and even at 300 K it is still large although the behavior begins to look more like conventional hysteresis, i.e., with a much less pronounced region of the GDW effect. This phenomenon appeared unexpectedly in this particular device, as we did nothing in the fabrication process to produce it intentionally.

The magnitude of the hysteresis is independent of the value of V t , as can be seen in Fig. 1e-f which shows maps of R xx made by sweeping V b either up (Fig. 1e) or down (Fig. 1f) and stepping V t as the slow axis. The resistance of such a thick graphite flake is sensitive to gate voltage because the accumulation of screening electrons or holes in the outermost graphene layers at its surface produces a sheet of lower resistivity that shunts the total resistance. 18 A resistance peak is seen as either of the surfaces passes through its neutral state. The cross-like features in Fig. 1e-f occur because the charge accumulation on the bottom surface depends only on the voltage on the bottom gate and is fully screened from the effect of the top gate by the bulk of the graphite, and vice versa for the top surface (see Supporting Information). As a result, we can unambiguously associate the hysteresis with only the bottom surface of the graphite flake. In addition, to the best of our knowledge this interface is not aligned with hBN (see Supporting Information and Supporting Information Fig. 1).

Combined, these observations make it very unlikely that moiré effects at this interface are a significant factor.

We next examine a device with a 5-layer thick channel consisting of Bernal trilayer graphene atop Bernal bilayer graphene with a 0.65 • misalignment between them. Additionally, this device has monolayer WSe 2 inserted between the graphene and the bottom hBN over roughly half of the channel (Fig. 2a). Just as in the 24-layer device, the resistance R xx is not hysteretic in top gate voltage V t (Fig. 2b) but exhibits large hysteresis on sweeping bottom gate voltage V b (Figs. 2c-d). The traces are again roughly symmetric about V b = 0, and over certain intervals in each sweep direction R xx seems almost independent of V b (GDW versus V b with V t = 0 in the region of the device with WSe 2 . e-f, Maps of R xx at B = 0 and R xy at B = 8 T as a function of both V t and V b , where V b is swept from negative to positive (e) or from positive to negative (f ). Measurements are shown from the region of the device without WSe 2 . The maps are taken by sweeping V t as the fast axis (negative to positive) and V b as the slow axis. The arrows show the relevant gate sweeping directions, where data is collected only for the sweeps corresponding to solid arrows, and the star represents the starting point of the measurement. effect). Remarkably, almost exactly the same behavior is seen in both parts of the device with and without the monolayer WSe 2 insertion (Figs. 2c-d).

In contrast with the 24-layer graphite device considered earlier, the 5-layer graphene channel is too thin to completely screen electric fields. Its resistivity thus depends on linear combinations of the two gate voltages, resulting in a diagonal trajectory of the charge neutrality point in a dual-gate map. The multiple sub-peaks in R xx are caused by the Fermi energy moving through minibands created by the long wavelength moiré pattern formed at the bilayer/trilayer graphene interface 19 (see Supporting Information Fig. 2). In a normal non-hysteretic device, these resistance features would follow parallel diagonal lines in a dualgate map corresponding to contours of fixed doping, with slopes equal to the capacitance ratio of the two gates. Figures 2e-f show dual-gate maps of R xx (at B = 0 T) and R xy (at B = 8 T) for the 5-layer device, measured by sweeping V t while incrementally changing V b either forward (Fig. 2e) or backward (Fig. 2f). We identify the charge neutrality point (CNP) as being where R xy changes sign. What is seen here closely resembles the hysteresis behavior reported in bilayer graphene devices. When V b is increased starting from a negative value (position A in Fig. 2e), the CNP and the R xx features initially seem to be "stuck" at nearly constant values of V t (GDW effect). At point B, the behavior changes and the CNP moves along a more familiar-looking diagonal line up to the highest gate voltage (point C).

On subsequently decreasing V b (Fig. 2f) the CNP appears to be stuck at a different value of V t (electron ratchet effect). At point D the CNP starts to move diagonally again. Overall, the CNP traces out a parallelogram-like loop. Careful analysis of the 24-layer device reveals essentially the same underlying behavior (see Supporting Information and Supporting Information Figs. 34).

Although the GDW/ratchet effect appears to be quite reproducible and insensitive to gate sweep speed on typical timescales of minutes-long sweeps, differences can be seen over longer time scales. Figure 3a Moreover, the detailed features in R xx (t) can be made to coincide perfectly with those in a fast measurement of R xx (V b ) by suitable choice of a map from t to V b , as shown in Fig. 3c. Such a mapping could be performed for all values of V b we held at for long periods of time (and for other parameters such as V t ; see Supporting Fig. 5 and further discussion in the Supporting Information). We conclude that the charge configuration of the devices lies in a continuum of history-dependent states with very long relaxation time scales. Furthermore, we find the mapping to be the same for the measurements on the device regions with and without the monolayer WSe 2 , which we discuss further in the Supporting Information.

Explanations for the GDW/ratchet phenomenon can be divided into two types: either the charge that accumulates due to the changing gate voltage is localized in the dielectric, or the charge accumulates within the graphene itself but for some reason is not mobile.

The latter requires a novel strongly correlated electronic mechanism that allows a fraction of the electrons in the channel to be localized while others remain itinerant, 12 and can be ruled out in our devices based on the persistence of the hysteresis at high temperature, large screening from bulk graphite, and observation of the effect with the WSe 2 spacer. We instead consider the former, more conventional, explanation involving charge redistribution in the dielectric. Since in the 24-layer device the hysteresis is purely associated with the lower graphite surface and bottom gate, we will only consider the electric fields and charges on one side (the bottom) of the channel. We assume a parallel-plate capacitor model with a distance d between the gate and channel, whose bottom surface is at position x = 0, with a distributed volume free charge density ρ(x) present in the dielectric. For now, we do not discuss the nature of ρ(x). Figure 4a shows an electron energy diagram of this scenario, with ρ(x) in blue and the electrostatic energy, -eφ(x), where e is the charge of the electron, shown in red (see Supporting Information for a detailed analysis).

The existence of hysteresis implies that ρ(x) has multiple configurations at a given V b .

One possibility is that these are connected to sliding ferroelectricity within the hBN. [20][21][22][23][24] However, as we discuss in the Supporting Information, several arguments make this mechanism implausible. The remaining possibility is that ρ(x) changes because electrons move between locations in the hBN. To analyze this scenario, we first summarize the observed phenomenology by way of the schematic in Fig. 4c. Without knowing the precise nature of the microscopic origin of ρ(x) in the hBN, we seek to place constraints on its behavior and characteristics. The central blue lines show the trajectory of the graphene doping as V b is swept with fixed V t = 0. The doping traces out a characteristic parallelogram, seen regularly in bilayer graphene devices 7,8 or the 5-layer device in this work (Fig. 2 and Supporting Information Fig. 7). We next draw inferred electron energy diagram cartoons for key points on the parallelogram (Fig. 4c, I-V). For simplicity we only consider ρ(x) to be non-zero near the channel, since charge in the hBN near the gate does not have a significant influence on The channel is grounded and the gate is held at V b . P is the polarization density and V s is the potential across the AA-stacked interface (see Supporting Information). c, (central panel) Schematic of the parallelogram in (V b , n) space that is traced out when sweeping the hysteretic gate. (outer panels) Electron energy diagrams, labeled I-V and II ′ corresponding to the respective points on the parallelogram, following a counter-clockwise evolution around the loop from I to V. II ′ is accessed by stopping at II and waiting without changing V b . In the electron energy diagrams, there is assumed to be a band of defect states near the hBN surface adjacent to the channel. Horizontal blue arrows depict electrons tunneling between defect states and the channel. In II-III-IV, diagonal blue arrows denote charges that are field-emitted into the hBN conduction band and travel to the gate. In II ′ diagonal blue arrows denote charge equilibration between the near-surface states in the hBN and defect states deeper within the dielectric. d, Schematic of the rate of charge flow, dQ/dt, as a function of electric field, E, in and out of the near-surface states. The critical field, E c , is reached when the rate of charge injection from the channel equals the rate of field emission from those states towards the gate. the doping in the channel. Within this framework, the GDW trajectory I-II can only be explained if there is a peak in ρ(x) near the hBN surface, where negative screening charge accumulates as V b increases. At point II this charge accumulation stops, and thereafter n changes rapidly with V b (along II-III-IV). When the sweep direction is reversed at IV, the GDW trajectory IV-V can only be explained by positive charge accumulation near the surface of the channel. Analogous reasoning can be followed around the negative-V b side of the hysteresis loop.

The cartoons in Fig. 4c also include the ingredients of a model that can qualitatively explain this behavior. In short, charges exchanged between the graphene and the nearsurface states of the hBN can result in screening of the gate along I-II and IV-V. The halting of the screening (i.e., GDW) behavior at II happens when the electric field (the slope of the red line in the cartoons) in the middle of the hBN reaches a critical value, E c , such that electrons in the near-surface states can be field-emitted 25 into the hBN conduction band and drift to the gate (Fig. 4d). As V b increases (II-III-IV), the near-surface-state charge decreases self-consistently in such a way as to maintain the bulk electric field close to E c , and the resistance of the graphite channel changes with V b . However, as soon as the sweep direction is reversed (at IV), the bulk electric field falls below E c and the surface states once again come into equilibrium with the channel, screening it from further changes in V b (the ratchet effect). The roughly symmetric nature of the hystersis around V b = 0 implies that there are both acceptor-and donor-like states near the chemical potential. Slow relaxation of the neutrality point, such as along the trajectory I-II', implies that when the field in the bulk is close to E c it is possible for the charge in the near-surface states to change with time even while they remain nearly in equilibrium with the channel. A complete description of this model can be found in the Supporting Information.

Despite the new constraints our findings place on the origin of the GDW/ratchet behavior, crucial open questions remain. Most significantly, we have not been able to identify the putative near-surface states in the hBN proposed within our mobile-charge model. We have studied devices with one hBN dielectric having a large density of carbon substitutional defects, 26 as well as devices with one hBN that was neutron irradiated (thought to create a large density of boron vacancies and possible lithium substitutions 27 ). The other hBN in these devices was a typical, nominally pristine flake. The neutron-irradiated hBN devices exhibit weak hysteresis upon sweeping the gate with the defect-rich dielectric, but do not show GDW/ratchet behavior (see Supporting Information Figs. 89). Thus, if defects are the origin of the latter effect, they must be some other type than those we have studied so far. Another possibility is that a layer of mobile charge is somehow created at the hBN surface due to some form of electrical or mechanical stress created upon stacking the vdW heterostructure and first operating the gate. If future research conclusively identifies the underlying mechanism as defect-based, the GDW effect could potentially then be tuned systematically, perhaps with ultraviolet illumination or carefully controlled voltage pulses. 4,6 New characterization techniques would be helpful for probing such effects, especially probes that can provide detailed information about the microscopics of the graphene/hBN interface.

We note that regardless of the microscopic nature of the mobile charge layer, it effectively behaves somewhat like a floating gate in our model. If the effect can be be reliably engineered in future studies, techniques to explore mechanisms of floating gate memory devices could be used to further constrain our proposed model. 28 Another key open question is whether a moiré pattern is strictly necessary for generating the GDW/ratchet effect. There is a considerable body of evidence that it may indeed be needed in bilayer graphene devices, although the situation is not completely clear as it is has been shown that the polarization charge density can sometimes exceed that of the fully filled moiré band, 8 and it is not always possible to identify the interfacial twist angle unambiguously. In contrast, our thicker devices do not appear to have alignment between the hysteretic graphene/hBN interface, although we do not have a precise measure of the twist angles of these interfaces, and there are other known interfaces within our devices that do have a long-wavelength moiré. We believe these do not play a role owing to various screening considerations, but cannot conclusively rule out their influence being important.

Additionally, the persistence of the effect with a WSe 2 monolayer insertion in our 5-layer device, along with reports of similar effects in a device with an artificially stacked MoS 2 substrate and various forms of hysteresis seen in graphene devices on CrI 3 and RuCl 3 , [29][30][31] raises questions about whether other vdW dielectrics can support similar GDW/ratchet behavior (without the need for a moiré interface). Our observations suggest that it could be easier to realize than previously thought, and point to new directions for exploring and eventually harnessing this intriguing behavior.

Additional experimental details and supporting discussion.