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1. Mode vector modulation: receiver architectures and DSP algorithms for polarization tracking

   https://doi.org/10.1364/OE.565232  

   Roudas, Ioannis; Biswas, Aishik; Brisson, Alexander; Dadras, Sina (November 2025, Optics Express)

   The emergence of modern hyperscale datacenters and artificial general intelligence (AGI) supercomputers creates an unprecedented demand for high-speed, scalable optical interconnects. Contemporary datacenter optical networks rely on pluggable transponders using M-ary pulse amplitude modulation (M-PAM) and direct detection (DD). To scale capacity, the prevailing strategy is to use parallel fiber strands that carry independent M-PAM/DD tributaries, a form of space-division multiplexing (SDM). Meanwhile, multicore fibers (MCFs) with nominally uncoupled, homogeneous, single-mode cores are intended to replace fiber strands in the future to reduce fiber count and simplify data center connectivity. Rather than treating each MCF core as an independent lightpath, we can exploit all MCF spatial and polarization degrees of freedom jointly to transmit multidimensional symbols via space modulation—a format we term mode vector modulation (MVM). This paper presents several novel MVM DD receiver architectures, each offering a different balance between hardware complexity and performance. In parallel, we introduce and evaluate a suite of digital signal processing (DSP) algorithms for polarization tracking, including both blind and pilot-assisted methods. Together, these innovations enhance the practicality of MVM as a high-sensitivity, bandwidth-efficient alternative to M-PAM for future direct-detection-based optical interconnects. 

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2. When nothing is certain, anything is possible: open innovation and lean approach at MVM

   https://doi.org/10.1111/radm.12453  

   Di Guardo, Maria Chiara; Marku, Elona; Bonivento, Walter Marcello; Castriotta, Manuel; Ferroni, Fernando; Galbiati, Cristiano; Gorini, Giuseppe; Loi, Michela (January 2021, R&D Management)

   null (Ed.)

   Using a participatory observation approach, this paper aims at exploring how public and private organizations have collaborated in response to the COVID-19 pandemic. We examine the case of MechanicalVentilator Milano (MVM), an international project with over 250 contributors and partners; this project aimed to achieve the challenging goal of designing and realizing a mechanical ventilator for mass production in about 6 weeks. The project received the Emergency Use Authorization granted by the U.S. Food and Drug Administration. The MVM ventilator is a reliable, fail-safe, and easy-to-operate mechanical ventilator that can be produced quickly at a large-scale, based on the readily available parts. The success of the MVM case is unique as it adopts open innovation practices to generate technology innovation, in addition to a lean perspective. Through the MVM project description, this study offers a framework that explains the interplay between open innovation and lean approach, highlighting the different internal and external forces and types of collaborations, and offering fine-grained insights in to the role of universities as platforms of multidisciplinary knowledge. This framework might serve as a basis for future theoretical and empirical research, providing practitioners with new best practices that are essential when facing a severe crisis like COVID-19. 

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3. Two-Dimensional Transmission of Four-Dimensional LDPC-Coded Modulation with Slepian Sequences for DSP-Free 40 km Metro Network Applications

   https://doi.org/10.3390/s22051815  

   Han, Xiao; Djordjevic, Ivan B. (March 2022, Sensors)

   The growing data demands are pushing researchers to pay more attention to spectrally efficient modulation formats. The four-dimensional (4D) signal constellation modulation format has been investigated for metro networks’ applications to achieve better power efficiency. To cope with such modulation formats, the requirement of better digital signal processing (DSP) is also increasing rapidly. More complicated DSPs bring us extra costs; thus, the DSP-free coherent receivers are also investigated because of the high-power consumption of conventional DSP-based receivers, but the transceivers upgrading also results in extra costs. In this invited paper we implement a 4-dimentional modulation format based on Slepian sequences. We applied LDPC coding and experimentally investigated the BER performance in a two-dimensional (2D) 40 km fiber link transmission and demonstrate that being error free is possible without employing the complicated DSP. We compared our proposed modulation scheme with regular 16QAM and found it outperforms 16QAM with DSP over back-to-back transmission by 3.8 dB improvement in OSNR when BER = 10−5, while over 40 km metro network communication link our proposed 4D modulation signals are still successfully transmitted, and the LDPC-coding still works properly with such a new transmission strategy. On the other hand, DSP-free transmission of LDPC-coded 16-QAM exhibits an early error floor phenomenon. 

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4. LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures

   https://doi.org/10.1109/ISCAS51556.2021.9401295  

   Schaefer, Clemens JS; Horeni, Mark; Taheri, Pooria; Joshi, Siddharth (May 2021, 2021 IEEE International Symposium on Circuits and Systems)

   null (Ed.)

   The increasingly central role of speech based human computer interaction necessitates on-device, low-latency, low-power, high-accuracy key word spotting (KWS). State-of-the-art accuracies on speech-related tasks have been achieved by long short-term memory (LSTM) neural network (NN) models. Such models are typically computationally intensive because of their heavy use of Matrix vector multiplication (MVM) operations. Compute-in-Memory (CIM) architectures, while well suited to MVM operations, have not seen widespread adoption for LSTMs. In this paper we adapt resistive random access memory based CIM architectures for KWS using LSTMs. We find that a hybrid system composed of CIM cores and digital cores achieves 90% test accuracy on the google speech data set at the cost of 25 uJ/decision. Our optimized architecture uses 5-bit inputs, and analog weights to produce 6-bit outputs. All digital computation are performed with 8-bit precision leading to a 3.7× improvement in computational efficiency compared to equivalent digital systems at that accuracy. 

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5. A Parallel 2/3-Approximation Algorithm for Vertex-Weighted Matching

   https://doi.org/10.1137/1.9781611976229.2  

   Al-Herz, Ahmed; Pothen, Alex (January 2020, SIAM 2020 Workshop on Combinatorial Scientific Computing)

   We consider the maximum vertex-weighted matching problem (MVM), in which non-negative weights are assigned to the vertices of a graph, and the weight of a matching is the sum of the weights of the matched vertices. Although exact algorithms for MVM are faster than exact algorithms for the maximum edge-weighted matching problem, there are graphs on which these exact algorithms could take hundreds of hours. For a natural number k, we design a k/(k + 1)approximation algorithm for MVM on non-bipartite graphs that updates the matching along certain short paths in the graph: either augmenting paths of length at most 2k + 1 or weight-increasing paths of length at most 2k. The choice of k = 2 leads to a 2/3-approximation algorithm that computes nearly optimal weights fast. This algorithm could be initialized with a 2/3-approximate maximum cardinality matching to reduce its runtime in practice. A 1/2-approximation algorithm may be obtained using k = 1, which is faster than the 2/3-approximation algorithm but it computes lower weights. The 2/3-approximation algorithm has time complexity O(Δ2m) while the time complexity of the 1/2-approximation algorithm is O(Δm), where m is the number of edges and Δ is the maximum degree of a vertex. Results from our serial implementations show that on average the 1/2-approximation algorithm runs faster than the Suitor algorithm (currently the fastest 1/2-approximation algorithm) while the 2/3-approximation algorithm runs as fast as the Suitor algorithm but obtains higher weights for the matching. One advantage of the proposed algorithms is that they are well-suited for parallel implementation since they can process vertices to match in any order. The 1/2- and 2/3-approximation algorithms have been implemented on a shared memory parallel computer, and both approximation algorithms obtain good speedups, while the former algorithm runs faster on average than the parallel Suitor algorithm. Care is needed to design the parallel algorithm to avoid cyclic waits, and we prove that it is live-lock free. 

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