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1. A Low-Power Phase Frequency Detector Using SRAM Cells in 22nm FD-SOI

   Jamadi, Behdad; Lee, Jungmin; Walling, Jeffrey S (June 2024, IEEE (Proceedings of the 2024 IEEE NEWCAS Conference))

   This paper presents the design and performance evaluation of a class of Phase-Frequency Detectors (PFDs) implemented utilizing only logic gates. It is a suitable candidate for applications like All-Digital Phase-Locked Loops (ADPLLs) and Delay-Locked Loops (DLLs). The proposed design is laid out in 65 nm CMOS and 22 nm FD-SOI technology and it is validated using post-extracted simulations. According to the results the proposed PFD is blind zone free and exhibits a small dead zone of ≈ 7 ps and ≈ 9 ps with a detection range of ±2π at a frequency of 10 GHz and 8 GHz in 22 nm and 65 nm, respectively. The proposed design has jitter ≈ 448 fs in 22 nm and ≈ 1.2 ps in 65 nm. The proposed PFD occupies a layout area of 115.625 μm2 and consumes 7.2 μW in 22nm and the area of the design is 225.7 μm2 and consumes 11.03 μW in 65nm. 

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2. IBIS Model Simulation Accuracy Improvement by Including Nonlinear Power Supply Induced Jitter Effect

   https://doi.org/10.1109/TSIPI.2025.3551671  

   Ding, Yifan; Wolff, Randy; Yang, Zhiping; Hwang, Chulsoon (January 2025, IEEE Transactions on Signal and Power Integrity)

   The input/output buffer information specification (IBIS) model is limited in its ability to handle power supply induced jitter. In this article, a direct IBIS switching coefficient modification algorithm that improves IBIS simulation accuracy by including the nonlinear jitter effect is presented. Compared with the previous IBIS-modification algorithms, the new algorithm is more straightforward, as it considers the time-averaged power supply noise effect on both the switching coefficient transition edge and the output transition edge. By addressing the nonlinear jitter, the model is more robust under conditions of significant power supply noise, both in terms of the output waveform shape and jitter estimation. This modification algorithm is implemented on an inverter chain circuit and a realistic double data rate (DDR) model. The performance with dc power noise, ac power noise, and multitone power noise is validated. The new proposed algorithm significantly enhances jitter modeling accuracy, reducing the maximum jitter prediction error from 47.3% to 8.19% in the inverter chain case under complex multitone power noise and from a maximum of 80% to below 20% in the realistic DDR model, compared with the previous algorithm. 

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3. Power Supply Induced Jitter: Introduction and Recent Advances

   https://doi.org/10.1109/TSIPI.2026.3665467  

   Hwang, Chulsoon; Tripathi, Jai Narayan; Oh, Dan (January 2026, IEEE Transactions on Signal and Power Integrity)

   Jitter is a critical concern in modern electronic systems, particularly as semiconductor devices increasingly operate with low supply rails to minimize power consumption. This article provides a comprehensive review of power supply induced jitter (PSIJ), which refers to timing variations directly caused by fluctuations in the power supply voltage. It examines the fundamental mechanisms of PSIJ and presents generalized models for predicting jitter. System-level jitter tracking characteristics are analyzed for serial links, memory interfaces, and synchronous logic to explain the resulting jitter spectrum. The article also summarizes various presilicon PSIJ modeling techniques, including time-domain, frequency-domain, slope-based, and delay-based methods. Finally, recent advancements in PSIJ research are discussed. 

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4. Jitterbug: A New Framework for Jitter-Based Congestion Inference

   https://doi.org/10.1007/978-3-030-98785-5_7  

   Carisimo, Esteban; Mok, Ricky K.; Clark, David D.; Claffy, K. C. (March 2022, Proceedings of the 23rd International Conference on Passive and Active Measurement, PAM 2022)

   We investigate a novel approach to the use of jitter to infer network congestion using data collected by probes in access networks. We discovered a set of features in jitter and jitter dispersion —a jitter-derived time series we define in this paper—time series that are characteristic of periods of congestion. We leverage these concepts to create a jitter-based congestion inference framework that we call Jitterbug. We apply Jitterbug’s capabilities to a wide range of traffic scenarios and discover that Jitterbug can correctly identify both recurrent and one-off congestion events. We validate Jitterbug inferences against state-of-the-art autocorrelation-based inferences of recurrent congestion. We find that the two approaches have strong congruity in their inferences, but Jitterbug holds promise for detecting one-off as well as recurrent congestion. We identify several future directions for this research including leveraging ML/AI techniques to optimize performance and accuracy of this approach in operational settings. 

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5. Channel Decoding from Multiple Looks Under Receiver Impairments

   https://doi.org/10.1109/CISS64860.2025.10944726  

   Guan, Bo; Goeckel, Dennis L (March 2025, IEEE)

   Receiver impairments play a significant role in determining system performance, particularly in adversarial environments subject to intentional jamming that seek to impair operation by collapsing the dynamic range of the receiver. Clock jitter is one of the key impairments that limits analog-to-digital (A/D) converters, and it causes significant challenges for channel decoding as it distorts the received signal’s timing, making compensation difficult. Motivated by this challenge, we consider performance and design for the two-look channel, which utilizes two receivers with independent clock jitter. Using a statistical characterization of the jitter, we derive the degree to which mutual information is increased in the two-look scenario versus the case when a single receiver is employed. This analysis motivates the consideration of optimal decoder design, but this is complicated by the nonlinear timing jitter model. Hence, we turn to a machine learning (ML)-based decoding framework. Numerical results demonstrate the improvement in mutual information from having two looks, and simulation results demonstrate the improved channel decoding performance. 

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