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1. High performance AlGaN/GaN MISHEMTs using N ₂ O treated TiO ₂ as the gate dielectric

   https://doi.org/10.1088/1361-6641/ad96dc  

   Zhama, Tuofu; Cui, Peng; Chen, Zijun; Zhang, Jie; Zhao, Haochen; Wei, Lincheng; Sharma, Ashwani; Bakaul, Saidur; Zeng, Yuping (December 2024, Semiconductor Science and Technology)

   Abstract In this work, TiO₂thin films deposited by the atomic layer deposition (ALD) method were treated with a special N₂O plasma surface treatment and used as the gate dielectric for AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MISHEMTs). The N₂O plasma surface treatment effectively reduces defects in the oxide during low-temperature ALD growth. In addition, it allows oxygen atoms to diffuse into the device cap layer to increase the barrier height and thus reduce the gate leakage current. These TiO₂films exhibit a dielectric constant of 54.8 and a two-terminal current of 1.96 × 10⁻¹⁰A mm⁻¹in 2μm distance. When applied as the gate dielectric, the AlGaN/GaN MISHEMT with a 2μm-gate-length shows a high on/off ratio of 2.59 × 10⁸and a low subthreshold slope (SS) of 84 mV dec⁻¹among all GaN MISHEMTs using TiO₂as the gate dielectric. This work provides a feasible way to significantly improve the TiO₂film electrical property for gate dielectrics, and it suggests that the developed TiO₂dielectric is a promising high-κgate oxide and a potential passivation layer for GaN-based MISHEMTs, which can be further extended to other transistors. 

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2. Observation of MOSFET-like behavior of a TFT based on amorphous oxide semiconductor channel layer with suitable integration of atomic layered deposited high-k gate dielectrics

   https://doi.org/10.1063/5.0136037  

   Yarbrough, Kelsea A; Behera, Makhes K; Beckford, Jasmine; Pradhan, Sangram K; Bahoura, Messaoud (February 2023, AIP Advances)

   A series of different high κ dielectrics such as HfO2, ZrO2, and Al2O3 thin films were studied as an alternative material for the possible replacement of traditional SiO2. These large areas, as well as conformal dielectrics thin films, were grown by the atomic layer deposition technique on a p-type silicon substrate at two different deposition temperatures (150 and 250 °C). Atomic force microscopic study reveals that the surface of the films is very smooth with a measured rms surface roughness value of less than 0.4 nm in some films. After the deposition of the high κ layer, a top metal electrode was deposited onto it to fabricate metal oxide semiconductor capacitor (MOSCAP) structures. The I–V curve reveals that the sample growth at high temperatures exhibits a high resistance value and lower leakage current densities. Frequency-dependent (100 kHz to 1 MHz) C–V characteristics of the MOSCAPs were studied steadily. Furthermore, we have prepared a metal oxide semiconductor field-effect transistor device with Al-doped ZnO as a channel material, and the electrical characteristic of the device was studied. The effect of growth temperature on the structure, surface morphology, crystallinity, capacitance, and dielectric properties of the high κ dielectrics was thoroughly analyzed through several measurement techniques, such as XRD, atomic force microscopy, semiconductor parameter analysis, and ultraviolet-visible spectroscopy. 

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3. Investigation of ALD HfSiOx as gate dielectric on β -Ga2O3 (001)

   https://doi.org/10.1063/5.0179813  

   Zhai, Xin; Wen, Zhuoqun; Odabasi, Oguz; Achamyeleh, Eyosyas; Sun, Kai; Ahmadi, Elaheh (March 2024, Applied Physics Letters)

   The interface and bulk properties of ∼20 nm hafnium-silicon-oxide (HfSiOx) dielectric deposited by atomic layer deposition (ALD) on (001) β-Ga2O3 were investigated systematically using deep ultraviolet photo-assisted capacitance–voltage (C–V) and current–voltage (I–V) measurements. The ALD HfSiOx dielectric constant, bulk, and HfSiOx/Ga2O3 interface quality and breakdown field were determined, and the impact of post-deposition annealing (PDA) on these parameters was studied. PDA reduced near-interface traps resulting in a smaller hysteresis without changing the dielectric constant. An average trap density of 2.72 × 1012 and 1.06 × 1012 cm−2 eV−1 was measured on samples with PDA at 400 and 900 °C, respectively. In addition, a high dielectric constant of 9.28 and breakdown field as high as 8.7 MV/cm were achieved on these devices. 

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4. Analysis and EOT Scaling on Top‐ and Double‐Gate 2D CVD‐Grown Monolayer MoS ₂ FETs

   https://doi.org/10.1002/aelm.202400152  

   Patoary, Naim Hossain; Mamun, Fahad Al; Xie, Jing; Grasser, Tibor; Sanchez_Esqueda, Ivan (November 2024, Advanced Electronic Materials)

   Abstract 2D layered semiconductors have attracted considerable attention for beyond‐Si complementary metal‐oxide‐semiconductor (CMOS) technologies. They can be prepared into ultrathin channel materials toward ultrascaled device architectures, including double‐gate field‐effect‐transistors (DGFETs). This work presents an experimental analysis of DGFETs constructed from chemical vapor deposition (CVD)‐grown monolayer (1L) molybdenum disulfide (MoS₂) with atomic layer deposition (ALD) of hafnium oxide (HfO₂) high‐k gate dielectrics (top and bottom). This extends beyond previous studies of DGFETs based mostly on exfoliated (few‐nm thick) MoS₂flakes, and advances toward large‐area wafer‐scale processing. Here, significant improvements in performance are obtained with DGFETs (i.e., improvements in ON/OFF ratio, ON‐state current, sub‐threshold swing, etc.) compared to single top‐gate FETs. In addition to multi‐gate device architectures (e.g., DGFETs), the scaling of the equivalent oxide thickness (EOT) is crucial toward improved electrostatics required for next‐generation transistors. However, the impact of EOT scaling on the characteristics of CVD‐grown MoS₂DGFETs remains largely unexplored. Thus, this work studies the impact of EOT scaling on subthreshold swing (SS) and gate hysteresis using current–voltage (I–V) measurements with varying sweep rates. The experimental analysis and results elucidate the basic mechanisms responsible for improvements in CVD‐grown 1L‐MoS₂DGFETs compared to standard top‐gate FETs. 

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5. Comparison of Hafnium Dioxide and Zirconium Dioxide Grown by Plasma-Enhanced Atomic Layer Deposition for the Application of Electronic Materials

   https://doi.org/10.3390/cryst10020136  

   Xiao, Zhigang; Kisslinger, Kim; Chance, Sam; Banks, Samuel (February 2020, Crystals)

   We report the growth of nanoscale hafnium dioxide (HfO2) and zirconium dioxide (ZrO2) thin films using remote plasma-enhanced atomic layer deposition (PE-ALD), and the fabrication of complementary metal-oxide semiconductor (CMOS) integrated circuits using the HfO2 and ZrO2 thin films as the gate oxide. Tetrakis (dimethylamino) hafnium (Hf[N(CH3)2]4) and tetrakis (dimethylamino) zirconium (IV) (Zr[N(CH3)2]4) were used as the precursors, while O2 gas was used as the reactive gas. The PE-ALD-grown HfO2 and ZrO2 thin films were analyzed using X-ray photoelectron spectroscopy (XPS), X-ray diffraction (XRD), and high-resolution transmission electron microscopy (HRTEM). The XPS measurements show that the ZrO2 film has the atomic concentrations of 34% Zr, 2% C, and 64% O while the HfO2 film has the atomic concentrations of 29% Hf, 11% C, and 60% O. The HRTEM and XRD measurements show both HfO2 and ZrO2 films have polycrystalline structures. n-channel and p-channel metal-oxide semiconductor field-effect transistors (nFETs and pFETs), CMOS inverters, and CMOS ring oscillators were fabricated to test the quality of the HfO2 and ZrO2 thin films as the gate oxide. Current-voltage (IV) curves, transfer characteristics, and oscillation waveforms were measured from the fabricated transistors, inverters, and oscillators, respectively. The experimental results measured from the HfO2 and ZrO2 thin films were compared. 

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