An official website of the United States government
We experimentally demonstrate the heterogeneous integration of ferroelectric hafnium zirconium oxide (HZO) with a silicon photonic microring resonator and demonstrate two non-volatile states for data storage by switching the polarization of HZO. Capped by transparent conducting titanium doped indium oxide (ITiO), the device functions as a metal insulator semiconductor (MIS) capacitor and utilizes the refractive index modulation via carrier (hole) accumulation and the effect of trapped charges at the ferroelectric–silicon interface to create the non-volatile binary switching states. In contrast to electronic devices where trapped charges at the silicon–ferroelectric interface reduce the memory window, in our ferrophotonic device, trapped charges amplify the refractive index difference in the binary states due to effective screening of the silicon in inversion. By switching the applied bias from negative to positive, the optical power transmitted through the ring switches with 3.5 dB output power difference between the non-volatile set and reset states and 40 pJ switching energy at ±8 V. Preliminary results suggest a path toward achieving sub-1 V non-volatile ferrophotonic switching.
more »
« less
A Dual‐Memory Ferroelectric Transistor Emulating Synaptic Metaplasticity for High‐Speed Reservoir Computing
ABSTRACT The exponential growth of edge artificial intelligence demands material‐focused solutions to overcome energy consumption and latency limitations when processing real‐time temporal data. Physical reservoir computing (PRC) offers an energy‐efficient paradigm but faces challenges due to limited device scalability and reconfigurability. Additionally, reservoir and readout layers require memory of different timescales, short‐term and long‐term respectively‐a material challenge hindering CMOS‐compatible implementations. This work demonstrates a CMOS‐compatible ferroelectric transistor using hafnium‐zirconium‐oxide (HZO) and silicon, enabling dual‐memory operation. This system exhibits non‐volatile long‐term memory (LTM) from ferroelectric HZO polarization and volatile short‐term memory (STM) from engineered non‐quasi‐static (NQS) channel‐charge relaxation driven by gate‐source/drain overlap capacitance. Ferroelectric polarization acts as non‐volatile programming of volatile dynamics: by modulating threshold voltage, the ferroelectric state deterministically switches the NQS time constant and computational behavior between paired‐pulse facilitation (PPF) and depression (PPD). This establishes a generalizable material‐design principle applicable to diverse ferroelectric‐semiconductor heterostructures, extending beyond silicon to oxide semiconductors and heterogeneously‐integrated systems. The device solves second‐order nonlinear tasks with 3.69 10 normalized error using only 16 reservoir states‐ reduction—achieving 20 response time ( faster) and 1.5 10 J energy consumption, providing an immediately manufacturable pathway for neuromorphic hardware and energy‐efficient edge intelligence.
more »
« less
- PAR ID:
- 10709162
- Publisher / Repository:
- Wiley Advanced Electronic Materials
- Date Published:
- Journal Name:
- Advanced Electronic Materials
- Volume:
- 12
- Issue:
- 13
- ISSN:
- 2199-160X
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
-
-
This study evaluates the ferroelectric properties of hafnium oxide (HfO₂) thin films for non-volatile integrated photonic applications. Experimental retention tests confirm stable polarization states across metal-insulator-metal stacks, thereby validating CMOS-compatible hafnium oxide capacitors as robust candidates for in-memory computing and photonic memory.more » « less
-
Abstract Ferroelectrics offer a promising material platform to realize energy-efficient non-volatile memory technology with the FeFET-based implementations being one of the most area-efficient ferroelectric memory architectures. However, the FeFET operation entails a fundamental trade-off between the read and the program operations. To overcome this trade-off, we propose in this work, a novel device concept, Mott-FeFET, that aims to replace the Silicon channel of the FeFET with VO 2 - a material that exhibits an electrically driven insulator–metal phase transition. The Mott-FeFET design, which demonstrates a (ferroelectric) polarization-dependent threshold voltage, enables the read current distinguishability (i.e., the ratio of current sensed when the Mott-FeFET is in state 1 and 0, respectively) to be independent of the program voltage. This enables the device to be programmed at low voltages without affecting the ability to sense/read the state of the device. Our work provides a pathway to realize low-voltage and energy-efficient non-volatile memory solutions.more » « less
-
Ferroelectric hafnium-zirconium oxide (HZO) is an excellent candidate for low-power non-volatile memory applications due to its demonstrated ferroelectricity at the nanoscale and compatibility with silicon-based technologies. The interface of HZO in contact with its electrode, typically TiN in a metal–ferroelectric–metal (MFM) capacitor configuration, is of particular interest because factors, such as volume confinement, impurity concentration, interfacial layers, thermal expansion mismatch, and defect trapping, are believed to play a crucial role in the ferroelectric performance of HZO-based devices. Processing variables, such as precursor type, oxygen source, dose duration, and deposition temperature, are known to strongly affect the quality of the oxide–metal interface. However, not many studies have focused on the effect of breaking or maintaining vacuum during MFM deposition. In this study, sequential, no-atmosphere processing (SNAP) is employed to avoid atmospheric exposure, where electrode TiN and ferroelectric HZO are deposited sequentially in the atomic layer deposition chamber without breaking vacuum. The effect of breaking vacuum during the sequential deposition steps is elucidated by fabricating and characterizing MFM capacitors with and without intentional vacuum breaks prior to the deposition of the HZO and top TiN. Using x-ray photoelectron spectroscopy and time-of-flight secondary ion mass spectrometry (ToF-SIMS), we reveal that breaking vacuum after bottom TiN electrode deposition leads to interfacial oxidation and increased carbon contamination, which preferentially stabilizes the non-ferroelectric tetragonal phase and lead to diminished remanent polarization. Avoiding carbon impurities and interfacial TiOx at the HZO and TiN interface using SNAP leads to heightened remanent polarization, reduced leakage current density, and elimination of the wake-up effect. Our work highlights the effect of vacuum breaking on the processing-structure-properties of HZO-based capacitors, revealing that maintaining vacuum can significantly improve ferroelectric properties.more » « less
-
In this work, hafnium zirconium oxide (HZO)-based 100 × 100 nm2 ferroelectric tunnel junction (FTJ) devices were implemented on a 300 mm wafer platform, using a baseline 65 nm CMOS process technology. FTJs consisting of TiN/HZO/TiN were integrated in between metal 1 (M1) and via 1 (V1) layers. Cross-sectional transmission electron microscopy and energy dispersive x-ray spectroscopy analysis confirmed the targeted thickness and composition of the FTJ film stack, while grazing incidence, in-plane x-ray diffraction analysis demonstrated the presence of orthorhombic phase Pca21 responsible for ferroelectric polarization observed in HZO films. Current measurement, as a function of voltage for both up- and down-polarization states, yielded a tunneling electroresistance (TER) ratio of 2.28. The device TER ratio and endurance behavior were further optimized by insertion of thin Al2O3 tunnel barrier layer between the bottom electrode (TiN) and ferroelectric switching layer (HZO) by tuning the band offset between HZO and TiN, facilitating on-state tunneling conduction and creating an additional barrier layer in off-state current conduction path. Investigation of current transport mechanism showed that the current in these FTJ devices is dominated by direct tunneling at low electric field (E < 0.4 MV/cm) and by Fowler–Nordheim (F–N) tunneling at high electric field (E > 0.4 MV/cm). The modified FTJ device stack (TiN/Al2O3/HZO/TiN) demonstrated an enhanced TER ratio of ∼5 (2.2× improvement) and endurance up to 106 switching cycles. Write voltage and pulse width dependent trade-off characteristics between TER ratio and maximum endurance cycles (Nc) were established that enabled optimal balance of FTJ switching metrics. The FTJ memory cells also showed multi-level-cell characteristics, i.e., 2 bits/cell storage capability. Based on full 300 mm wafer statistics, a switching yield of >80% was achieved for fabricated FTJ devices demonstrating robustness of fabrication and programming approach used for FTJ performance optimization. The realization of CMOS-compatible nanoscale FTJ devices on 300 mm wafer platform demonstrates the promising potential of high-volume large-scale industrial implementation of FTJ devices for various nonvolatile memory applications.more » « less
- Free Publicly Accessible Full Text
-
Accepted Manuscript
- Journal Article:
- https://doi.org/10.1002/aelm.202500844
