Conference PaperA 2048-Neuron Spiking Neural Network Accelerator With Neuro-Inspired Pruning And Asynchronous Network On Chip In 40nm CMOSCho, Sung-Gun; Beigne, Edith; Zhang, ZhengyaA 40nm, 2.56mm2 , 2048-neuron globally asynchronous locally synchronous (GALS) spiking neural network (SNN) chip is presented. For scalability, we allow neurons to specialize to excitatory or inhibitory, and apply distance-based pruning to cut communication and memory. An asynchronous router limits the latency to 1.32ns per hop. The reduced traffic and lower latency allow the input channel to be parallelized to achieve 7.85GSOP/s at 0.7V, consuming 5.9pJ/SOP.2019-04-01101292732019 IEEE Custom Integrated Circuits Conference (CICC)1 to 4https://doi.org/10.1109/CICC.2019.87801161734871National Science Foundation