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As 6G wireless communications push the operation frequency above 110 GHz, it is critical to have low-loss interconnects that can be accurately tested. To this end, D-band (110 GHz to 170 GHz) substrate-integrated waveguides (SIWs) are designed on a 100-μm-thick SiC substrate. The fabricated SIWs are probed on-wafer in a single sweep from 70 kHz to 220 GHz with their input/output transitioned to grounded coplanar waveguides (GCPWs). From CPW-probed scattering parameters, two-tier calibration is used to de-embed the SIW-GCPW transitions and to extract the intrinsic SIW characteristics. In general, the record low loss measured agrees with that obtained from finite-element full-wave electromagnetic simulation. For example, across the D band, the average insertion loss is approximately 0.2 dB/mm, which is several times better than that of coplanar or microstrip transmission lines fabricated on the same substrate. A 3-pole filter exhibits a 1-dB insertion loss at 135 GHz with 20-dB selectivity and 11% bandwidth, which is order-of-magnitude better than typical on-chip filters. These results underscore the potential of using SIWs to interconnect transistors, filters, antennas, and other circuit elements on the same monolithically integrated chip. 

A D-band (110‒170 GHz) SiC substrate-integrated waveguide (SIW) is characterized on-wafer by two different vector network analyzers (VNAs): a 220-GHz single-sweep VNA and an 110-GHz VNA with WR8 (90‒140 GHz) and WR5 (140‒220 GHz) frequency extenders. To facilitate probing, the SIW input and output are transitioned to grounded coplanar waveguides (GCPWs). Two-tier calibration is used to de-embed the SIW-GCPW transitions as well as to extract the intrinsic SIW characteristics. In general, the two VNAs are in agreement and both result in an ultra-low insertion loss of approximately 0.2 dB/mm for the same SIW, despite stitching errors at band edges.