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Multi-lag cross-correlations (X-Corr) are essential building blocks in radar and communication for range/velocity detection and synchronization. Performing X-corrs necessitates efficient delay and correlation blocks. Traditionally, high bandwidth X-corr is performed using high-speed ADCs followed by digital multiply-and-accumulates (MACs). However, 5–20 TOPS/W X-Corr efficiencies lead to 0.1-1W per cross-correlator, limiting deployability in power-constrained applications. Alternatively, to realize X-corr using prior single-lag analog correlators, wideband analog delays (>10ns delays with 4GHz BW) should be integrated on chip to enable multiple lags. Furthermore, replicating N analog correlators, leads to an impractical chip area. Therefore, practical analog X-Corr requires: (i) high input bandwidths, (ii) long correlation length, N for high signal processing gain (SPG=10log10(N)), (iii) high compute-efficiency (>100 TOPS/W) with compute accuracy compared to digital MACs (>7-bit), (iv) single-shot readout across all N X-corr lags in a compact area. In this work, we leverage a sampling-based approach to create large analog delays and area/power-efficient four-transistor analog compute cell to present a margin-propagation (MP) based fully-analog X-Corr compute engine in 22nm SOI-CMOS achieving: (i) 1-4GS/s input, (ii) single-shot 256-length X-Corrs across all 256 lags resulting in a 256x256 X-correlator, 8.2-8.5 bit compute accuracy or hardware dynamic range (HDR) of 51-53dB, (iii) high compute efficiency of 996–1060 TOPS/W (6.6x better than SoA), (iv) high compute density of 1.3 TOPS/mm2 (7x better than SoA). We also demonstrate an X-band code-domain radar with a range resolution of 15cm across 256 range bins, supporting up to 1024 chirp averages with a 115Hz refresh rate. 

Zinc dry electrodes were fabricated and investigated for wearable electrophysiology recording. Results from electrochemical impedance spectroscopy and electromyography functionality testing show that zinc electrodes are suitable for use in electrophysiology. Two electrode configurations were tested: a standard disc and a custom tripolar concentric ring configuration. However, no functional benefit was observed with the tripolar concentric ring electrodes as compared to the disc electrodes.Zinc, Electrodes, Concentric Ring Electrodes, EMG, Biosensing 

Abstract The brain integrates activity across networks of interconnected neurons to generate behavioral outputs. Several physiological and imaging-based approaches have been previously used to monitor responses of individual neurons. While these techniques can identify cellular responses greater than the neuron’s action potential threshold, less is known about the events that are smaller than this threshold or are localized to subcellular compartments. Here we use NEAs to obtain temporary intracellular access to neurons allowing us to record information-rich data that indicates action potentials, and sub-threshold electrical activity. We demonstrate these recordings from primary hippocampal neurons, induced pluripotent stem cell-derived (iPSC) neurons, and iPSC-derived brain organoids. Moreover, our results show that our arrays can record activity from subcellular compartments of the neuron. We suggest that these data might enable us to correlate activity changes in individual neurons with network behavior, a key goal of systems neuroscience. 

Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations. 

Abstract Neuromorphic computing shows promise for advancing computing efficiency and capabilities of AI applications using brain-inspired principles. However, the neuromorphic research field currently lacks standardized benchmarks, making it difficult to accurately measure technological advancements, compare performance with conventional methods, and identify promising future research directions. This article presents NeuroBench, a benchmark framework for neuromorphic algorithms and systems, which is collaboratively designed from an open community of researchers across industry and academia. NeuroBench introduces a common set of tools and systematic methodology for inclusive benchmark measurement, delivering an objective reference framework for quantifying neuromorphic approaches in both hardware-independent and hardware-dependent settings. For latest project updates, visit the project website (neurobench.ai).