skip to main content

Attention:

The NSF Public Access Repository (NSF-PAR) system and access will be unavailable from 11:00 PM ET on Thursday, October 10 until 2:00 AM ET on Friday, October 11 due to maintenance. We apologize for the inconvenience.


Search for: All records

Creators/Authors contains: "Heo, Deukhyoun Heo"

Note: When clicking on a Digital Object Identifier (DOI) number, you will be taken to an external site maintained by the publisher. Some full text articles may not yet be available without a charge during the embargo (administrative interval).
What is a DOI Number?

Some links on this page may take you to non-federal websites. Their policies may differ from this site.

  1. With the increasing complexity of highly integrated system on chips (SoCs), the power management system (PMS) is required to provide several power supplies efficiently for individual blocks. This paper presents a single-inductor multiple outputs (SIMO) an inductor-first hybrid converter that generates three outputs between 0.4V and 1.6V from a 1.8V input. The proposed multiple-output hybrid power stage can improve the conversion efficiency by reducing inductor current while extending the output voltage range compared with the existing hybrid topologies. In addition, the proposed converter employs an on-chip switched-capacitor power stage (SCPS) with a dual switching frequency technique, resulting in a fast response time, low cross-regulation, and reduced number of on-chip pads. Measurement results show that the converter achieves a peak efficiency of 87.5% with a maximum output current of 450mA. The converter is integrated with a fast voltage regulation loop with a 500MHz system clock to achieve less than 0.01mA/mV cross-regulation and a maximum 20mV overshoot at full-load transient response. The design is fabricated in the standard 180nm CMOS technology 
    more » « less
  2. We present a low phase noise four-core triple-band voltage controlled-oscillator (VCO) with reconfigurable oscillator cores and multi-mode resonator. By activation/deactivation of oscillator cores and change of resonator impedance in three modes of operations, the proposed VCO provides complete freedom in selecting the resonance frequency for three operation bands in the mm-wave range. Compared to VCOs using switch-capacitor-bank for multi-band operation, the proposed VCO does not use any series switches with passive components in the resonator to provide a low phase noise in all three bands of operation. As a proof of concept, the proposed four-core triple-band VCO is implemented in a 65 nm CMOS process using four class-D oscillators with tail switches and a compact high-Q triple-mode resonator. The VCO oscillation frequencies center at 19, 28, and 38 GHz while providing good phase noise and low power consumption in all bands. Measured results show the total frequency tuning range (FTR) of 38.5% while the PN at 1MHz offset varies from -100.3 dBc/Hz to -106.06dBc/Hz resulting in an excellent FoMT of 199.8 dBc/Hz. 
    more » « less