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Ring-Binary-Learning-with-Errors (RBLWE)-based post-quantum cryptography (PQC) is a promising scheme suitable for lightweight applications. This paper presents an efficient hardware systolic accelerator for RBLWE-based PQC, targeting high-performance applications. We have briefly given the algorithmic background for the proposed design. Then, we have transferred the proposed algorithmic operation into a new systolic accelerator. Lastly, field-programmable gate array (FPGA) implementation results have confirmed the efficiency of the proposed accelerator.more » « less
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Imana, Jose L. ; He, Pengzhou ; Bao, Tianyou ; Tu, Yazheng ; Xie, Jiafeng ( , IEEE Transactions on Circuits and Systems I: Regular Papers)