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The band alignment of Atomic Layer Deposited SiO 2 on (In x Ga 1−x ) 2 O 3 at varying indium concentrations is reported before and after annealing at 450 °C and 600 °C to simulate potential processing steps during device fabrication and to determine the thermal stability of MOS structures in high-temperature applications. At all indium concentrations studied, the valence band offsets (VBO) showed a nearly constant decrease as a result of 450 °C annealing. The decrease in VBO was −0.35 eV for (In 0.25 Ga 0.75 ) 2 O 3 , −0.45 eV for (In 0.42 Ga 0.58 ) 2 O 3 , −0.40 eV for (In 0.60 Ga 0.40 ) 2 O 3 , and −0.35 eV (In 0.74 Ga 0.26 ) 2 O 3 for 450 °C annealing. After annealing at 600 °C, the band alignment remained stable, with <0.1 eV changes for all structures examined, compared to the offsets after the 450 °C anneal. The band offset shifts after annealing are likely due to changes in bonding at the heterointerface. Even after annealing up to 600 °C, the band alignment remains type I (nested gap) for all indium compositions of (In x Ga 1−x ) 2 O 3 studied.