Wideband beamforming and interference cancellation for phased array antennas requires advances in signal processing algorithms, software, and specialized hardware platforms. A high-throughput array receiver has been developed that enables communication in radio frequency interference-rich environments with field programmable gate array (FPGA)-based frequency channelization and packetization. In this study, a real-time interference mitigation algorithm was implemented on graphics processing units (GPUs) contained in the data pipeline. The key contribution is a hardware and software pipeline for subchannelized wideband array signal processing with 150 MHz instantaneous bandwidth and interference cancellation with a heterogeneous, distributed, and scaleable digital signal processing (DSP) architecture that achieves 30 dB interferer cancellation null depth in real time with a moving interference source.
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Ruzindana, Mark W. ; Burnett, Mitchell C. ; Kunzler, Jakob W. ; Marsh, David M. ; Lyman, Kayla ; Evans, Kyle ; Whipple, Adam ; Warnick, Karl F. ; Jeffs, Brian D. ( , 2021 IEEE USNC-URSI Radio Science Meeting (Joint with AP-S Symposium)