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In this work, we propose a novel approach for the real-time estimation of chip-level spatial power maps for commercial Google Coral M.2 TPU chips based on a machine-learning technique for the first time. The new method can enable the development of more robust runtime power and thermal control schemes to take advantage of spatial power information such as hot spots that are otherwise not available. Different from the existing commercial multi-core processors in which real-time performance-related utilization information is available, the TPU from Google does not have such information. To mitigate this problem, we propose to use features that are related to the workloads of running different deep neural networks (DNN) such as the hyperparameters of DNN and TPU resource information generated by the TPU compiler. The new approach involves the offline acquisition of accurate spatial and temporal temperature maps captured from an external infrared thermal imaging camera under nominal working conditions of a chip. To build the dynamic power density map model, we apply generative adversarial networks (GAN) based on the workload-related features. Our study shows that the estimated total powers match the manufacturer's total power measurements extremely well. Experimental results further show that the predictions of power maps are quite accurate, with the RMSE of only 4.98\rm mW/mm^2, or 2.6\% of the full-scale error. The speed of deploying the proposed approach on an Intel Core i7-10710U is as fast as 6.9ms, which is suitable for real-time estimation. 

2.5D chiplet-based technology promises an efficient integration technique for advanced designs with more functionality and higher performance. Temperature and related thermal optimization, heat removal are of critical importance for temperature-aware physical synthesis for chiplets. This paper presents a novel graph convolutional networks (GCN) architecture to estimate the thermal map of the 2.5D chiplet-based systems with the thermal resistance networks built by the compact thermal model (CTM). First, we take the total power of all chiplets as an input feature, which is a global feature. This additional global information can overcome the limitation that the GCN can only extract local information via neighborhood aggregation. Second, inspired by convolutional neural networks (CNN), we add skip connection into the GCN to pass the global feature directly across the hidden layers with the concatenation operation. Third, to consider the edge embedding feature, we propose an edge-based attention mechanism based on the graph attention networks (GAT). Last, with the multiple aggregators and scalers of principle neighborhood aggregation (PNA) networks, we can further improve the modeling capacity of the novel GCN. The experimental results show that the proposed GCN model can achieve an average RMSE of 0.31 K and deliver a 2.6$\times$ speedup over the fast steady-state solver of open-source {\it HotSpot} based on SuperLU. More importantly, the GCN model demonstrates more useful generalization or transferable capability. Our results show that the trained GCN can be directly applied to predict thermal maps of six unseen datasets with acceptable mean RMSEs of less than 0.67 K without retraining via inductive learning. 

Electromigration (EM) becomes a major concern for VLSI circuits as the technology advances in the nanometer regime. With Korhonen equations, EM assessment for VLSI circuits remains challenged due to the increasing integrated density. VLSI multisegment interconnect trees can be naturally viewed as graphs. Based on this observation, we propose a new graph convolution network (GCN) model, which is called {\it EMGraph} considering both node and edge embedding features, to estimate the transient EM stress of interconnect trees. Compared with recently proposed generative adversarial network (GAN) based stress image-generation method, EMGraph model can learn more transferable knowledge to predict stress distributions on new graphs without retraining via inductive learning. Trained on the large dataset, the model shows less than 1.5% averaged error compared to the ground truth results and is orders of magnitude faster than both COMSOL and state-of-the-art method. It also achieves smaller model size, 4X accuracy and 14X speedup over the GAN-based method. 

In this paper, we propose an image generative learning framework for electrostatic analysis for VLSI dielectric aging estimation. This work leverages the observation that the synthesized multi layer interconnect VLSI layout can be viewed as layered 2D images and the analysis can be viewed as the image generation. The efficient image-to-image translation property of generative learning is therefore used to obtain the potential distribution on the respective interconnect layers. Compared with the recent CNN-based electrostatic analysis method, the new method can lead to 1.54x speedup for inference due to reduced neural network structures and parameters. We demonstrate the proposed method for time-dependent dielectric breakdown analysis and show the significant speedup compared to the traditional numerical method. 

Abstract Dark matter is a key piece of the current cosmological scenario, with weakly interacting massive particles (WIMPs) a leading dark matter candidate. WIMPs have not been detected in their conventional parameter space (100 GeV ≲ M χ ≲ 100 TeV), a mass range accessible with current Imaging Atmospheric Cherenkov Telescopes. As ultraheavy dark matter (UHDM; M χ ≳ 100 TeV) has been suggested as an underexplored alternative to the WIMP paradigm, we search for an indirect dark matter annihilation signal in a higher mass range (up to 30 PeV) with the VERITAS γ -ray observatory. With 216 hr of observations of four dwarf spheroidal galaxies, we perform an unbinned likelihood analysis. We find no evidence of a γ -ray signal from UHDM annihilation above the background fluctuation for any individual dwarf galaxy nor for a joint-fit analysis, and consequently constrain the velocity-weighted annihilation cross section of UHDM for dark matter particle masses between 1 TeV and 30 PeV. We additionally set constraints on the allowed radius of a composite UHDM particle. 

Electromigration (EM) is a major failure effect for on-chip power grid networks of deep submicron VLSI circuits. EM degradation of metal grid lines can lead to excessive voltage drops (IR drops) before the target lifetime. In this paper, we propose a fast data-driven EM-induced IR drop analysis framework for power grid networks, named {\it GridNet}, based on the conditional generative adversarial networks (CGAN). It aims to accelerate the incremental full-chip EM-induced IR drop analysis, as well as IR drop violation fixing during the power grid design and optimization. More importantly, {\it GridNet} can naturally leverage the differentiable feature of deep neural networks (DNN) to {\it obtain the sensitivity information of node voltage with respect to the wire resistance (or width) with marginal cost}. {\it GridNet} treats continuous time and the given electrical features as input conditions, and the EM-induced time-varying voltage of power grid networks as the conditional outputs, which are represented as data series images. We show that {\it GridNet} is able to learn the temporal dynamics of the aging process in continuous time domain. Besides, we can take advantage of the sensitivity information provided by {\it GridNet} to perform efficient localized IR drop violation fixing in the late stage design and optimization. Numerical results on 36000 synthesized power grid network samples demonstrate that the new method can lead to $10^5\times$ speedup over the recently proposed full-chip coupled EM and IR drop analysis tool. We further show that localized IR drop violation fix for the same set of power grid networks can be performed remarkably efficiently using the cheap sensitivity computation from {\it GridNet}. 

Two-dimensional van der Waals (vdWs) materials have gathered a lot of attention recently. However, the majority of these materials have Curie temperatures that are well below room temperature, making it challenging to incorporate them into device applications. In this work, we synthesized a room-temperature vdW magnetic crystal Fe5GeTe2 with a Curie temperature T$_c = 332$ K, and studied its magnetic properties by vibrating sample magnetometry (VSM) and broadband ferromagnetic resonance (FMR) spectroscopy. The experiments were performed with external magnetic fields applied along the c-axis (H$\parallel$c) and the ab-plane (H$\parallel$ab), with temperatures ranging from 300 to 10 K. We have found a sizable Landé g-factor difference between the H$\parallel$c and H$\parallel$ab cases. In both cases, the Landé g-factor values deviated from g = 2. This indicates contribution of orbital angular momentum to the magnetic moment. The FMR measurements reveal that Fe5GeTe2 has a damping constant comparable to Permalloy. With reducing temperature, the linewidth was broadened. Together with the VSM data, our measurements indicate that Fe5GeTe2 transitions from ferromagnetic to ferrimagnetic at lower temperatures. Our experiments highlight key information regarding the magnetic state and spin scattering processes in Fe5GeTe2, which promote the understanding of magnetism in Fe5GeTe2, leading to implementations of Fe5GeTe2 based room-temperature spintronic devices.