Search for: All records

One of the most challenging obstacles to realizing exascale computing is minimizing the energy consumption of L2 cache, main memory, and interconnects to that memory. For promising cryogenic computing schemes utilizing Josephson junction superconducting logic, this obstacle is exacerbated by the cryogenic system requirements that expose the technology’s lack of high-density, high-speed and power-efficient memory. Here we demonstrate an array of cryogenic memory cells consisting of a non-volatile three-terminal magnetic tunnel junction element driven by the spin Hall effect, combined with a superconducting heater-cryotron bit-select element. The write energy of these memory elements is roughly 8 pJ with a bit-select element, designed to achieve a minimum overhead power consumption of about 30%. Individual magnetic memory cells measured at 4 K show reliable switching with write error rates below 10⁻⁶, and a 4 × 4 array can be fully addressed with bit select error rates of 10⁻⁶. This demonstration is a first step towards a full cryogenic memory architecture targeting energy and performance specifications appropriate for applications in superconducting high performance and quantum computing control systems, which require significant memory resources operating at 4 K.

Many key electronic technologies (e.g., large‐scale computing, machine learning, and superconducting electronics) require new memories that are at the same time fast, reliable, energy‐efficient, and of low‐impedance, which has remained a challenge. Nonvolatile magnetoresistive random access memories (MRAMs) driven by spin–orbit torques (SOTs) have promise to be faster and more energy‐efficient than conventional semiconductor and spin‐transfer‐torque magnetic memories. It is reported that the spin Hall effect of low‐resistivity Au_0.25Pt_0.75thin films enables ultrafast antidamping‐torque switching of SOT‐MRAM devices for current pulse widths as short as 200 ps. If combined with industrial‐quality lithography and already‐demonstrated interfacial engineering, an optimized MRAM cell based on Au_0.25Pt_0.75can have energy‐efficient, ultrafast, and reliable switching, for example, a write energy of <1 fJ (<50 fJ) for write error rate of 50% (<10⁻⁵) for 1 ns pulses. The antidamping torque switching of the Au_0.25Pt_0.75devices is ten times faster than expected from a rigid macrospin model, most likely because of the fast micromagnetics due to the enhanced nonuniformity within the free layer. The feasibility of Au_0.25Pt_0.75‐based SOT‐MRAMs as a candidate for ultrafast, reliable, energy‐efficient, low‐impedance, and unlimited‐endurance memory is demonstrated.