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Abstract Image sensors with internal computing capability enable in-sensor computing that can significantly reduce the communication latency and power consumption for machine vision in distributed systems and robotics. Two-dimensional semiconductors have many advantages in realizing such intelligent vision sensors because of their tunable electrical and optical properties and amenability for heterogeneous integration. Here, we report a multifunctional infrared image sensor based on an array of black phosphorous programmable phototransistors (bP-PPT). By controlling the stored charges in the gate dielectric layers electrically and optically, the bP-PPT’s electrical conductance and photoresponsivity can be locally or remotely programmed with 5-bit precision to implement an in-sensor convolutional neural network (CNN). The sensor array can receive optical images transmitted over a broad spectral range in the infrared and perform inference computation to process and recognize the images with 92% accuracy. The demonstrated bP image sensor array can be scaled up to build a more complex vision-sensory neural network, which will find many promising applications for distributed and remote multispectral sensing.
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Abstract Excitons are elementary optical excitation in semiconductors. The ability to manipulate and transport these quasiparticles would enable excitonic circuits and devices for quantum photonic technologies. Recently, interlayer excitons in 2D semiconductors have emerged as a promising candidate for engineering excitonic devices due to their long lifetime, large exciton binding energy, and gate tunability. However, the charge-neutral nature of the excitons leads to weak response to the in-plane electric field and thus inhibits transport beyond the diffusion length. Here, we demonstrate the directional transport of interlayer excitons in bilayer WSe2driven by the propagating potential traps induced by surface acoustic waves (SAW). We show that at 100 K, the SAW-driven excitonic transport is activated above a threshold acoustic power and reaches 20 μm, a distance at least ten times longer than the diffusion length and only limited by the device size. Temperature-dependent measurement reveals the transition from the diffusion-limited regime at low temperature to the acoustic field-driven regime at elevated temperature. Our work shows that acoustic waves are an effective, contact-free means to control exciton dynamics and transport, promising for realizing 2D materials-based excitonic devices such as exciton transistors, switches, and transducers up to room temperature.
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Neural networks have been widely used for advanced tasks from image recognition to natural language processing. Many recent works focus on improving the efficiency of executing neural networks in diverse applications. Researchers have advocated processing‐in‐memory (PIM) architecture as a promising candidate for training and testing neural networks because PIM design can reduce the communication cost between storage and computing units. However, there exist noises in the PIM system generated from the intrinsic physical properties of both memory devices and the peripheral circuits. The noises introduce challenges in stably training the systems and achieving high test performance, e.g., accuracy in classification tasks. This review discusses the current approaches to tolerating noise effects for both training and inference in PIM systems and provides an analysis from a hardware–software codesign perspective. Noise‐tolerant strategies for PIM systems based on resistive random‐access memory (ReRAM), including circuit‐level, algorithm‐level, and system‐level solutions are explained. In addition, we also present some selected noise‐tolerate cases in PIM systems for generative adversarial networks and physical neural networks.
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Among layered and 2D semiconductors, there are many with substantial optical anisotropy within individual layers, including group‐IV monochalcogenides
MX (M = Ge or Sn andX = S or Se) and black phosphorous (bP). Recent work has suggested that the in‐plane crystal orientation in such materials can be switched (e.g., rotated through 90°) through an ultrafast, displacive (i.e., nondiffusive), nonthermal, and lower‐power mechanism by strong electric fields, due to in‐plane dielectric anisotropy. In theory, this represents a new mechanism for light‐controlling‐light in photonic integrated circuits (PICs). Herein, numerical device modeling is used to study device concepts based on switching the crystal orientation of SnSe and bP in PICs. Ring resonators and 1 × 2 switches with resonant conditions that change with the in‐plane crystal orientations SnSe and bP are simulated. The results are broadly applicable to 2D materials with ferroelectric and ferroelastic crystal structures including SnO, GeS, and GeSe. -
Abstract Reconfigurability of photonic integrated circuits (PICs) has become increasingly important due to the growing demands for electronic–photonic systems on a chip driven by emerging applications, including neuromorphic computing, quantum information, and microwave photonics. Success in these fields usually requires highly scalable photonic switching units as essential building blocks. Current photonic switches, however, mainly rely on materials with weak, volatile thermo‐optic or electro‐optic modulation effects, resulting in large footprints and high energy consumption. As a promising alternative, chalcogenide phase‐change materials (PCMs) exhibit strong optical modulation in a static, self‐holding fashion, but the scalability of present PCM‐integrated photonic applications is still limited by the poor optical or electrical actuation approaches. Here, with phase transitions actuated by in situ silicon PIN diode heaters, scalable nonvolatile electrically reconfigurable photonic switches using PCM‐clad silicon waveguides and microring resonators are demonstrated. As a result, intrinsically compact and energy‐efficient switching units operated with low driving voltages, near‐zero additional loss, and reversible switching with high endurance are obtained in a complementary metal‐oxide‐semiconductor (CMOS)‐compatible process. This work can potentially enable very large‐scale CMOS‐integrated programmable electronic–photonic systems such as optical neural networks and general‐purpose integrated photonic processors.