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Award ID contains: 1763503

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  1. ; ; ; ; (, Proc. of 41st IEEE International Conference on Computer Design)
    Accepted Manuscript Full Text Available
  2. ; ; ; ; (, Proc. of Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis)
    Full Text Available 
  3. ; ; ; (, Proc. of IEEE High-Performance Extreme Computing Conference)
    Accepted Manuscript Full Text Available
  4. ; ; ; ; ; (, Proc. of IEEE 29th International Conference on Embedded and Real-Time Computing Systems and Applications)
    Full Text Available 
  5. ; ; ; ; ; ; ; ; ; ; et al (, Proc. of 38th International Cosmic Ray Conference — PoS(ICRC2023))
  6. ; ; ; ; ; ; ; ; ; ; et al (, Proc. of 38th International Cosmic Ray Conference — PoS(ICRC2023))
    Full Text Available 
  7. ; (, Proc. of Seventh Workshop on Computer Architecture Research with RISC-V)
    Accepted Manuscript Full Text Available
  8. ; ; (, Proc. of 26th IEEE International Symposium on Real-Time Distributed Computing)
    Full Text Available 
  9. ; ; ; ; (, Washington University in St. Louis)
    With the ever-growing popularity of Graph Neural Networks (GNNs), efficient GNN inference is gaining tremendous attention. Field-Programmable Gate Arrays (FPGAs) are a promising execution platform due to their fine-grained parallelism, low power consumption, reconfigurability, and concurrent execution. Even better, High-Level Synthesis (HLS) tools help bridge the gap between the non-trivial FPGA development efforts and rapid emergence of new GNN models. To enable investigation into how effectively modern HLS tools can accelerate GNN inference, we present GNNHLS, a benchmark suite containing a software stack for data generation and baseline deployment and FPGA implementations of 6 well-tuned GNN HLS kernels. 
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  10. ; ; ; ; (, Proc. of IEEE High-Performance Extreme Computing Conference)
    Full Text Available