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Abstract The development of novel doping strategies compatible with high‐resolution patterning and low cost, large‐scale manufacturing is critical to the future development of electronic devices. Here, an approach to achieve nanoscale site‐specific doping of Si wafer using DNA as both the template and the dopant carrier is reported. Upon thermal treatment, the phosphorous atoms in the DNA diffuse into Si wafer, resulting in doping within the region right around the DNA template. A doping length of 30 nm is achieved for 10 s of thermal treatment at 1000 °C. Prototype field effect transistors are fabricated using the DNA‐doped Si substrate; the device characteristics confirmed that the Si is n‐doped. It is also shown that this approach can be extended to achieve both n‐type and p‐type site‐specific doping of Si by using DNA nanostructures to pattern self‐assembled monolayers. This work shows that the DNA template is a dual‐use template that can both pattern Si and deliver dopants. 

Neuromorphic computing has the great potential to enable faster and more energy‐efficient computing by overcoming the von Neumann bottleneck. However, most emerging nonvolatile memory (NVM)‐based artificial synapses suffer from insufficient precision, nonlinear synaptic weight update, high write voltage, and high switching latency. Moreover, the spatiotemporal dynamics, an important temporal component for cognitive computing in spiking neural networks (SNNs), are hard to generate with existing complementary metal–oxide–semiconductor (CMOS) devices or emerging NVM. Herein, a three‐terminal, Li_xWO₃‐based electrochemical synapse (LiWES) is developed with low programming voltage (0.2 V), fast programming speed (500 ns), and high precision (1024 states) that is ideal for artificial neural networks applications. Time‐dependent synaptic functions such as paired‐pulse facilitation (PPF) and temporal filtering that are critical for SNNs are also demonstrated. In addition, by leveraging the spike‐encoded timing information extracted from the short‐term plasticity (STP) behavior in the LiWES, an SNNs model is built to benchmark the pattern classification performance of the LiWES, and the result indicates a large boost in classification performance (up to 128×), compared with those NO‐STP synapses. 

To identify superior thermal contacts to graphene we implement a high throughput methodology that systematically explores the Ni-Pd alloy composition spectrum and the effect of Cr adhesion layer thickness on the thermal interface conductance with monolayer CVD graphene. Frequency domain thermoreflectance measurements of two independently prepared Ni- Pd/Cr/graphene/SiO2 samples both identify a maximum in the metal/graphene/SiO2 junction thermal interface conductance of 114± (39, 25) MW/m2K and 113± (33, 22) MW/m2K at ~10 atomic percent Pd in Ni—nearly double the highest reported value for pure metals and three times that of pure Ni or Pd. The presence of Cr, at any thickness, suppresses this maximum. Although the origin of the peak is unresolved, we find that it correlates to a region of the Ni-Pd phase diagram that exhibits a miscibility gap. Cross sectional imaging by high resolution transmission electron microscopy identifies striations in the alloy at this particular composition, consistent with separation into multiple phases. Through this work, we draw attention to alloys in the search for better contacts to 2D materials for next generation devices. 

Neuromorphic computing has recently emerged as a promising paradigm to overcome the von-Neumann bottleneck and enable orders of magnitude improvement in bandwidth and energy efficiency. However, existing complementary metal-oxide-semiconductor (CMOS) digital devices, the building block of our computing system, are fundamentally different from the analog synapses, the building block of the biological neural network—rendering the hardware implementation of the artificial neural networks (ANNs) not scalable in terms of area and power, with existing CMOS devices. In addition, the spatiotemporal dynamic, a crucial component for cognitive functions in the neural network, has been difficult to replicate with CMOS devices. Here, we present the first topological insulator (TI) based electrochemical synapse with programmable spatiotemporal dynamics, where long-term and short-term plasticity in the TI synapse are achieved through the charge transfer doping and ionic gating effects, respectively. We also demonstrate basic neuronal functions such as potentiation/depression and paired-pulse facilitation with high precision (>500 states per device), as well as a linear and symmetric weight update. We envision that the dynamic TI synapse, which shows promising scaling potential in terms of energy and speed, can lead to the hardware acceleration of truly neurorealistic ANNs with superior cognitive capabilities and excellent energy efficiency.