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Title: Pitfalls and Tradeoffs in Simultaneous, On-Chip FPGA Delay Measurement
Award ID(s):
1659190
PAR ID:
10080006
Author(s) / Creator(s):
; ; ;
Date Published:
Journal Name:
International Symposium on Field-Programmable Gate Arrays
Page Range / eLocation ID:
100 to 104
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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