Well-Posed Verilog-A Compact Model for Phase Change Memory
- Award ID(s):
- 1710009
- NSF-PAR ID:
- 10097727
- Date Published:
- Journal Name:
- 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
- Page Range / eLocation ID:
- 369 to 373
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
-
Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1109/SISPAD.2018.8551667
