Imani, Mohsen, Salamat, Sahand, Gupta, Saransh, Huang, Jiani, and Rosing, Tajana. FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity. Retrieved from https://par.nsf.gov/biblio/10100929. IEEE Asia and South Pacific Design Automation Conference . Web. doi:10.1145/3287624.3287667.
Imani, Mohsen, Salamat, Sahand, Gupta, Saransh, Huang, Jiani, and Rosing, Tajana.
"FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity". IEEE Asia and South Pacific Design Automation Conference (). Country unknown/Code not available. https://doi.org/10.1145/3287624.3287667.https://par.nsf.gov/biblio/10100929.
@article{osti_10100929,
place = {Country unknown/Code not available},
title = {FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity},
url = {https://par.nsf.gov/biblio/10100929},
DOI = {10.1145/3287624.3287667},
abstractNote = {},
journal = {IEEE Asia and South Pacific Design Automation Conference},
author = {Imani, Mohsen and Salamat, Sahand and Gupta, Saransh and Huang, Jiani and Rosing, Tajana},
}
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