Cacheline Utilization-Aware Link Traffic Compression for Modular GPUs
- Award ID(s):
- 1725743
- NSF-PAR ID:
- 10123076
- Date Published:
- Journal Name:
- IEEE International Conference on VLSI Design and Embedded Systems (VLSID)
- Page Range / eLocation ID:
- 137 to 142
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1109/VLSID49098.2020.00041
