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Abstract We report a novel approach for realizing tunable/reconfigurable terahertz (THz) mesh filters on the basis of micromachined mesa‐array structures. In this approach, different filter patterns are generated virtually using photogenerated free carriers in a semiconducting mesa‐array structure to achieve superior tunability and reconfigurability. Micromachined mesa‐array structures enable the formation of high fidelity, optically generated mesh filter structures for THz frequencies. To evaluate the proposed filter designs, the optically patterned spatial modulation properties of mesa‐array structures were first evaluated. Reconfigurable mesh filter prototypes were then designed and simulated using silicon mesa arrays with 50 × 50 μm2square mesa unit cells. Simulations show that reconfigurable bandpass filters (BPFs) operating in the frequency range of 108–489 GHz with insertion losses of 0.82–1.13 dB can be achieved. By employing smaller unit cells, the frequency tuning range and filtering performance can be further improved. In addition to BPFs, other filter functionalities can also be realized utilizing the proposed approach. The wide tuning range and reconfigurability of the mesh filters demonstrate that the proposed approach is promising for developing tunable/reconfigurable circuits and components for advanced THz sensing, imaging, and communications.
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Four-Element Wide Modulated Bandwidth MIMO Receiver With >35-dB Interference Cancellation
Active control of interference is necessary with increased cell density, more complicated environmental reflections, and coexistence of multiple networks for next-generation wireless communications. The existing radio receiver architectures for spatial interference cancellation (SpICa) are limited by the spatial nulls created by a phased-antenna array (PAA) and cannot cover wide modulated bandwidths (BWs). We propose a discrete-time-delay-compensating technique for canceling spatial interferences with wide modulated BWs to reduce the dynamic range requirement for the data converter. Integral to the proposed circuit is a switched-capacitor-based multiply-and-accumulate processor that incorporates a reconfigurable phase interpolator and time interleaver for precise digitally tunable delays and multiplication of the input signal to an orthogonal matrix. The digital time interleaver enables 5-ps resolution with a reconfigurable range up to 15 ns. The measured results demonstrate greater than 35-dB SpICa over 80-MHz modulated BWs in the 65-nm CMOS with 52 mW of power consumption.
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- PAR ID:
- 10146886
- Date Published:
- Journal Name:
- IEEE Transactions on Microwave Theory and Techniques
- ISSN:
- 0018-9480
- Page Range / eLocation ID:
- 1 to 1
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Journal Article:
- https://doi.org/10.1109/TMTT.2020.2986441
