Ma, Yufei, Cao, Yu, Vrudhula, Sarma, and Seo, Jae-sun. Automatic compilation of diverse CNNs onto high-performance FPGA accelerators. Retrieved from https://par.nsf.gov/biblio/10165012. IEEE transactions on computeraided design of integrated circuits and systems 39.2 Web. doi:10.1109/TCAD.2018.2884972.

Ma, Yufei, Cao, Yu, Vrudhula, Sarma, & Seo, Jae-sun. Automatic compilation of diverse CNNs onto high-performance FPGA accelerators. IEEE transactions on computeraided design of integrated circuits and systems, 39 (2). Retrieved from https://par.nsf.gov/biblio/10165012. https://doi.org/10.1109/TCAD.2018.2884972

Ma, Yufei, Cao, Yu, Vrudhula, Sarma, and Seo, Jae-sun. "Automatic compilation of diverse CNNs onto high-performance FPGA accelerators". IEEE transactions on computeraided design of integrated circuits and systems 39 (2). Country unknown/Code not available. https://doi.org/10.1109/TCAD.2018.2884972. https://par.nsf.gov/biblio/10165012.

@article{osti_10165012,
place = {Country unknown/Code not available}, title = {Automatic compilation of diverse CNNs onto high-performance FPGA accelerators}, url = {https://par.nsf.gov/biblio/10165012}, DOI = {10.1109/TCAD.2018.2884972}, abstractNote = {}, journal = {IEEE transactions on computeraided design of integrated circuits and systems}, volume = {39}, number = {2}, author = {Ma, Yufei and Cao, Yu and Vrudhula, Sarma and Seo, Jae-sun}, }