skip to main content

Title: A Hardware-in-the-Loop Platform for DC Protection
Real-time (RT) simulation of power and energy conversion systems allows engineers to interface both simulation- and hardware-based controls using controller hardware-in-the-loop (CHiL) simulation of networks of power electronic converters (PECs) in order to de-risk highly developmental systems such as next generation electrified transportation systems and dc microgrids. CHiL exploration and performance verification moves a design from Technology Readiness Level (TRL) 3 to TRL 4 without incurring significant cost investments in developmental hardware platforms, which otherwise discourages such endeavors. A real-time CHiL simulation platform suitable for explorations of protective equipment, protection schemes and networked PEC dc and mixed dc-ac power distribution architectures must be capable of simulating common-mode behavior, various grounding schemes, and fault transients at sufficiently high resolution. This paper demonstrates this capability using a Latency-Based Linear Multistep Compound (LB-LMC) simulation method implemented in a commercially sustainable, adaptable and expandable FPGA-based test and instrumentation platform. The proposed CHiL platform achieves real-time power system simulations, including detailed switching commutations of networked PECs, with 50 ns resolution, and faithfully produces resonant and transient behaviors associated with line-to-ground (LG) and line-to-line (LL) faults and fault recovery in ungrounded PEC-based dc systems. This resolution in RT cannot be achieved with today’s commercial off-the-shelf CHiL platforms. This paper demonstrates the need for high resolution RT simulation of LG and LL faults within dc systems, and demonstrates a CHiL approach that enables dc protection design explorations and protective control hardware testing while taking into account the realistic aspects that affect fault characteristics in PEC-based dc systems, such as cable current rating and length, cable and PEC parasitic LG capacitance and PEC i...  more » « less
Award ID(s):
Author(s) / Creator(s):
; ; ; ;
Date Published:
Journal Name:
IEEE Journal of Emerging and Selected Topics in Power Electronics
Page Range / eLocation ID:
1 to 1
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. Real Time (RT) simulation of Power Electronics (PE) allows engineers to interface real-time controls for controller hardware-in-the-loop CHiL. CHiL verification moves a design from Technology Readiness Level (TRL) 3 to TRL 4. For RT CHiL simulation of DC protection systems, the RT simulation platform must be able to simulate common mode behavior, various grounding schemes, and fault transients at sufficiently high resolution so as not to interfere with the protection system design. This paper demonstrates this capability using a Latency Based Linear Multistep Compount (LB-LMC) simulation method implemented in Field Programmable Gate Arrays (FPGAs), in order to achieve 50ns resolution of common mode behaviors, including Line-to-Ground (LG) overvoltages resulting from LG faults and fault recovery in ungrounded DC systems. This resolution in RT cannot be achieved with today's commercial off-the-shelf (COTS) RT CHiL platforms. Furthermore, this capability can be expanded to other grounding schemes and larger PE networks, enabling RT CHiL validation of protection schemes for networks of power electronic converters at TRL 4. 
    more » « less
  2. null (Ed.)
    In this paper, a detection and localization technique based on dual State and Parameter Estimation (SE and PE respectively) for series dc arc faults is presented. Detection of series arc faults in dc microgrids is challenging due to its low fault current. By using the available set of sensor measurement data over a period of time, a Least Squares (LS) based SE algorithm estimates the dc microgrid's bus voltages and injection currents. Kalman Filter (KF) is then used to estimate the line conductances in the network, which are used to detect and localize (with respect to the faulted line) the series arc fault. Simulation results are presented with different case studies to demonstrate the robustness of the algorithm to normal operating conditions and different number and placement of sensors. Finally, Control Hardware in the Loop (CHIL) results are shown. 
    more » « less
  3. DC networks are becoming more popular in a wide range of applications. However, the difficulty in detecting and localizing a high impedance series arc fault presents, a major challenge slowing the wider deployment of dc networks/microgrids. In this paper, a Kalman Filter (KF) based algorithm to monitor the operation of a dc microgrid by estimating the line admittances and consequently detecting/localizing series arc faults is introduced. The proposed algorithm uses voltage and current samples from the nodes in the distribution network to estimate the line admittances. By determining these values, it is possible to quickly isolate the faulted section and reconfigure the network after a fault occurs. Since, the disturbance caused by a high impedance series arc fault spreads across almost the entire microgrid, the KF algorithm is structured to detect the faulted line in the grid with precision. Simulation and Control Hardware in the Loop (CHIL) results are presented demonstrating the feasibility of implementation. 
    more » « less
  4. This article identifies and validates the use of ultrafast silicon carbide (SiC) junction field effect transistor (JFET)-based self-powered solid-state circuit breakers (SSCBs) as the enabling protective device for a 340 Vdc residential dc community microgrid. These SSCBs will be incorporated into a radial distribution system in order to enhance fault discrimination through autonomous operation. Because of the nature and characteristics of short-circuit fault inception in dc microgrids, the time-current trip characteristics of protective devices must be several orders of magnitude faster than conventional circuit breakers. The proposed SSCBs detect short-circuit faults by sensing the sudden voltage rise between its two power terminals and draw power from the fault condition itself to turn off SiC JFETs and then, coordinate with no-load contacts that can isolate the fault. Depending upon the location of the SSCBs in the microgrid, either unidirectional or bidirectional implementations are incorporated. Cascaded SSCBs are tuned using a simple resistor change to enable fault discrimination between upstream high-current feeds and downstream lower current branches. Operation of one of the SSCBs and three in cascaded arrangements are validated both in simulation and with a hardware test platform. Thermal impact on the SSCB is discussed as well. The target application is a residential dc microgrid that will be installed as part of a revitalization effort of an inner city Milwaukee neighborhood. 
    more » « less
  5. Due to limited amplitude and controlled phase of current supplied by inverter-interfaced renewable power plants (IIRPPs), the IIRPP-side distance protection of lines connected to IIRPPs fails to detect the fault location accurately, so it may malfunction. The composite sequence network of a line connected to an IIRPP during asymmetrical faults is analyzed, and an adaptive distance protection based on the analytical model of additional impedance is proposed in this study. Based on open circuit property of negative-sequence network at the IIRPP-side, the equivalent impedance of power grid and current flowing through fault point are calculated in real-time using local measurements, which are substituted into the analytical model of additional impedance to calculate fault location. In the case of negative-sequence reactive current injection from IIRPPs during asymmetrical faults, the error of calculating fault point current from local measurements is analyzed and corrected to ensure reliability of the proposed protection. The proposed protection alleviates the effect of fault resistance in a system with weak sources. In addition, the proposed protection can adapt to different grid codes (GCs), the operation mode change of the power grid, and the capacity change of the IIRPP. PSCAD/EMTDC test results verify the effectiveness of the proposed protection. 
    more » « less