Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization (Journal Article) | NSF PAGES

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Citation Details

Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization

Authors:: Neto, W.L.; Moreira, M.T.; Amaru, L.; Yu, C.; Gaillardon, P.E

Award ID(s):: 2008144 2019336

Publication Date:: 2021-04-01

NSF-PAR ID:: 10272213

Journal Name:: Proceedings of the ASPDAC Asia and South Pacific Design Automation Conference

ISSN:: 2153-6961

Sponsoring Org:: National Science Foundation

Free Publicly Accessible Full Text
Accepted Manuscript1.0
Publisher's Version of Record
https://doi.org/0000-0002-8840-1540