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1. Constructing Optimal Contraction Trees for Tensor Network Quantum Circuit Simulation

   https://doi.org/10.1109/HPEC55821.2022.9926353  

   Ibrahim, Cameron; Lykov, Danylo; He, Zichang; Alexeev, Yuri; Safro, Ilya (September 2022, 2022 IEEE High Performance Extreme Computing Conference (HPEC))

   One of the key problems in tensor network based quantum circuit simulation is the construction of a contraction tree which minimizes the cost of the simulation, where the cost can be expressed in the number of operations as a proxy for the simulation running time. This same problem arises in a variety of application areas, such as combinatorial scientific computing, marginalization in probabilistic graphical models, and solving constraint satisfaction problems. In this paper, we reduce the computationally hard portion of this problem to one of graph linear ordering, and demonstrate how existing approaches in this area can be utilized to achieve results up to several orders of magnitude better than existing state of the art methods for the same running time. To do so, we introduce a novel polynomial time algorithm for constructing an optimal contraction tree from a given order. Furthermore, we introduce a fast and high quality linear ordering solver, and demonstrate its applicability as a heuristic for providing orderings for contraction trees. Finally, we compare our solver with competing methods for constructing contraction trees in quantum circuit simulation on a collection of randomly generated Quantum Approximate Optimization Algorithm Max Cut circuits and show that our method achieves superior results on a majority of tested quantum circuits. Reproducibility: Our source code and data are available at https://github.com/cameton/HPEC2022_ContractionTrees. 

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2. Constructing Optimal Contraction Trees for Tensor Network Quantum Circuit Simulation

   Cameron Ibrahim; Danylo Lykov; Zichang He; Yuri Alexeev; Ilya Safro (September 2022, IEEE High Performance Extreme Computing Conference (HPEC))

   One of the key problems in tensor network based quantum circuit simulation is the construction of a contraction tree which minimizes the cost of the simulation, where the cost can be expressed in the number of operations as a proxy for the simulation running time. This same problem arises in a variety of application areas, such as combinatorial scientific computing, marginalization in probabilistic graphical models, and solving constraint satisfaction problems. In this paper, we reduce the computationally hard portion of this problem to one of graph linear ordering, and demonstrate how existing approaches in this area can be utilized to achieve results up to several orders of magnitude better than existing state of the art methods for the same running time. To do so, we introduce a novel polynomial time algorithm for constructing an optimal contraction tree from a given order. Furthermore, we introduce a fast and high quality linear ordering solver, and demonstrate its applicability as a heuristic for providing orderings for contraction trees. Finally, we compare our solver with competing methods for constructing contraction trees in quantum circuit simulation on a collection of randomly generated Quantum Approximate Optimization Algorithm Max Cut circuits and show that our method achieves superior results on a majority of tested quantum circuits. Reproducibility: Our source code and data are available at https://github.com/cameton/HPEC2022_ContractionTrees. 

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3. Logical abstractions for noisy variational Quantum algorithm simulation

   https://doi.org/10.1145/3445814.3446750  

   Huang, Yipeng; Holtzen, Steven; Millstein, Todd; Van den Broeck, Guy; Martonosi, Margaret (April 2021, 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS ’21))

   null (Ed.)

   Due to the unreliability and limited capacity of existing quantum computer prototypes, quantum circuit simulation continues to be a vital tool for validating next generation quantum computers and for studying variational quantum algorithms, which are among the leading candidates for useful quantum computation. Existing quantum circuit simulators do not address the common traits of variational algorithms, namely: 1) their ability to work with noisy qubits and operations, 2) their repeated execution of the same circuits but with different parameters, and 3) the fact that they sample from circuit final wavefunctions to drive a classical optimization routine. We present a quantum circuit simulation toolchain based on logical abstractions targeted for simulating variational algorithms. Our proposed toolchain encodes quantum amplitudes and noise probabilities in a probabilistic graphical model, and it compiles the circuits to logical formulas that support efficient repeated simulation of and sampling from quantum circuits for different parameters. Compared to state-of-the-art state vector and density matrix quantum circuit simulators, our simulation approach offers greater performance when sampling from noisy circuits with at least eight to 20 qubits and with around 12 operations on each qubit, making the approach ideal for simulating near-term variational quantum algorithms. And for simulating noise-free shallow quantum circuits with 32 qubits, our simulation approach offers a 66X reduction in sampling cost versus quantum circuit simulation techniques based on tensor network contraction. 

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4. Quantum Circuit Mapping Based on Incremental and Parallel SAT Solving

   https://doi.org/10.4230/LIPIcs.SAT.2024.29  

   Yang, Jiong; Kharkov, Yaroslav A; Shi, Yunong; Heule, Marijn J_H; Dutertre, Bruno (August 2024, Schloss Dagstuhl – Leibniz-Zentrum für Informatik)

   Chakraborty, Supratik; Jiang, Jie-Hong Roland (Ed.)

   Quantum Computing (QC) is a new computational paradigm that promises significant speedup over classical computing in various domains. However, near-term QC faces numerous challenges, including limited qubit connectivity and noisy quantum operations. To address the qubit connectivity constraint, circuit mapping is required for executing quantum circuits on quantum computers. This process involves performing initial qubit placement and using the quantum SWAP operations to relocate non-adjacent qubits for nearest-neighbor interaction. Reducing the SWAP count in circuit mapping is essential for improving the success rate of quantum circuit execution as SWAPs are costly and error-prone. In this work, we introduce a novel circuit mapping method by combining incremental and parallel solving for Boolean Satisfiability (SAT). We present an innovative SAT encoding for circuit mapping problems, which significantly improves solver-based mapping methods and provides a smooth trade-off between compilation quality and compilation time. Through comprehensive benchmarking of 78 instances covering 3 quantum algorithms on 2 distinct quantum computer topologies, we demonstrate that our method is 26× faster than state-of-the-art solver-based methods, reducing the compilation time from hours to minutes for important quantum applications. Our method also surpasses the existing heuristics algorithm by 26% in SWAP count. 

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5. Multi-level Steiner Trees

   https://doi.org/10.1145/3368621  

   Ahmed, Reyan; Angelini, Patrizio; Sahneh, Faryad Darabi; Efrat, Alon; Glickenstein, David; Gronemann, Martin; Heinsohn, Niklas; Kobourov, Stephen G.; Spence, Richard; Watkins, Joseph; et al (December 2019, ACM Journal of Experimental Algorithmics)

   null (Ed.)

   In the classical Steiner tree problem, given an undirected, connected graph G =( V , E ) with non-negative edge costs and a set of terminals T ⊆ V , the objective is to find a minimum-cost tree E &prime ⊆ E that spans the terminals. The problem is APX-hard; the best-known approximation algorithm has a ratio of ρ = ln (4)+ε < 1.39. In this article, we study a natural generalization, the multi-level Steiner tree (MLST) problem: Given a nested sequence of terminals T ℓ ⊂ … ⊂ T 1 ⊆ V , compute nested trees E ℓ ⊆ … ⊆ E 1 ⊆ E that span the corresponding terminal sets with minimum total cost. The MLST problem and variants thereof have been studied under various names, including Multi-level Network Design, Quality-of-Service Multicast tree, Grade-of-Service Steiner tree, and Multi-tier tree. Several approximation results are known. We first present two simple O (ℓ)-approximation heuristics. Based on these, we introduce a rudimentary composite algorithm that generalizes the above heuristics, and determine its approximation ratio by solving a linear program. We then present a method that guarantees the same approximation ratio using at most 2ℓ Steiner tree computations. We compare these heuristics experimentally on various instances of up to 500 vertices using three different network generation models. We also present several integer linear programming formulations for the MLST problem and compare their running times on these instances. To our knowledge, the composite algorithm achieves the best approximation ratio for up to ℓ = 100 levels, which is sufficient for most applications, such as network visualization or designing multi-level infrastructure. 

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