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This content will become publicly available on June 23, 2024

Title: A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip
Award ID(s):
1919147
NSF-PAR ID:
10435542
Author(s) / Creator(s):
; ; ; ; ; ;
Date Published:
Journal Name:
IEEE Journal of Solid-State Circuits
ISSN:
0018-9200
Page Range / eLocation ID:
1 to 10
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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