Usable Circuits with Imperfect Scan Logic

Pomeranz, Irith

doi:10.1109/ATS56056.2022.00039

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Citation Details

Usable Circuits with Imperfect Scan Logic

Award ID(s):: 2041649

PAR ID:: 10466720

Author(s) / Creator(s):: Pomeranz, Irith

Publisher / Repository:: IEEE

Date Published:: 2022-11-01

ISBN:: 978-1-6654-7227-2

Page Range / eLocation ID:: 156 to 161

Format(s):: Medium: X

Location:: Taichung City, Taiwan

Sponsoring Org:: National Science Foundation

Free Publicly Accessible Full Text
Accepted Manuscript1.0
Conference Paper:
https://doi.org/10.1109/ATS56056.2022.00039

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