The emergence of embedded magnetic random-access memory (MRAM) and its integration in mainstream semiconductor manufacturing technology have created an unprecedented opportunity for engineering computing systems with improved performance, energy efficiency, lower cost, and unconventional computing capabilities. While the initial interest in the existing generation of MRAM—which is based on the spin-transfer torque (STT) effect in ferromagnetic tunnel junctions—was driven by its nonvolatile data retention and lower cost of integration compared to embedded Flash (eFlash), the focus of MRAM research and development efforts is increasingly shifting toward alternative write mechanisms (beyond STT) and new materials (beyond ferromagnets) in recent years. This has been driven by the need for better speed vs density and speed vs endurance trade-offs to make MRAM applicable to a wider range of memory markets, as well as to utilize the potential of MRAM in various unconventional computing architectures that utilize the physics of nanoscale magnets. In this Perspective, we offer an overview of spin–orbit torque (SOT) as one of these beyond-STT write mechanisms for the MRAM devices. We discuss, specifically, the progress in developing SOT-MRAM devices with perpendicular magnetization. Starting from basic symmetry considerations, we discuss the requirement for an in-plane bias magnetic field which has hindered progress in developing practical SOT-MRAM devices. We then discuss several approaches based on structural, magnetic, and chiral symmetry-breaking that have been explored to overcome this limitation and realize bias-field-free SOT-MRAM devices with perpendicular magnetization. We also review the corresponding material- and device-level challenges in each case. We then present a perspective of the potential of these devices for computing and security applications beyond their use in the conventional memory hierarchy. 
                        more » 
                        « less   
                    
                            
                            Thermal optimization of two-terminal SOT-MRAM
                        
                    
    
            While magnetoresistive random-access memory (MRAM) stands out as a leading candidate for embedded nonvolatile memory and last-level cache applications, its endurance is compromised by substantial self-heating due to the high programming current density. The effect of self-heating on the endurance of the magnetic tunnel junction (MTJ) has primarily been studied in spin-transfer torque (STT)-MRAM. Here, we analyze the transient temperature response of two-terminal spin–orbit torque (SOT)-MRAM with a 1 ns switching current pulse using electro-thermal simulations. We estimate a peak temperature range of 350–450 °C in 40 nm diameter MTJs, underscoring the critical need for thermal management to improve endurance. We suggest several thermal engineering strategies to reduce the peak temperature by up to 120 °C in such devices, which could improve their endurance by at least a factor of 1000× at 0.75 V operating voltage. These results suggest that two-terminal SOT-MRAM could significantly outperform conventional STT-MRAM in terms of endurance, substantially benefiting from thermal engineering. These insights are pivotal for thermal optimization strategies in the development of MRAM technologies. 
        more » 
        « less   
        
    
    
                            - PAR ID:
- 10539450
- Publisher / Repository:
- AIP Publishing
- Date Published:
- Journal Name:
- Journal of Applied Physics
- Volume:
- 136
- Issue:
- 1
- ISSN:
- 0021-8979
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
- 
            
- 
            Non-volatile memory (NVM) technologies such as spin-transfer torque magnetic random access memory (STT-MRAM) and spin-orbit torque magnetic random access memory (SOT-MRAM) have significant advantages compared to conventional SRAM due to their non-volatility, higher cell density, and scalability features. While previous work has investigated several architectural implications of NVM for generic applications, in this work we present DeepNVM, a framework to characterize, model, and analyze NVM-based caches in GPU architectures for deep learning (DL) applications by combining technologyspecific circuit-level models and the actual memory behavior of various DL workloads. We present both iso-capacity and isoarea performance and energy analysis for systems whose lastlevel caches rely on conventional SRAM and emerging STT-MRAM and SOT-MRAM technologies. In the iso-capacity case, STT-MRAM and SOT-MRAM provide up to 4.2× and 5× energy-delay product (EDP) reduction and 2.4× and 3× area reduction compared to conventional SRAM, respectively. Under iso-area assumptions, STT-MRAM and SOT-MRAM provide 2.3× EDP reduction on average across all workloads when compared to SRAM. Our comprehensive cross-layer framework is demonstrated on STT-/SOT-MRAM technologies and can be used for the characterization, modeling, and analysis of any NVM technology for last-level caches in GPU platforms for deep learning applications.more » « less
- 
            With the rapid advancement of DNNs, numerous Process-in-Memory (PIM) architectures based on various memory technologies (Non-Volatile (NVM)/Volatile Memory) have been developed to accelerate AI workloads. Magnetic Random Access Memory (MRAM) is highly promising among NVMs due to its zero standby leakage, fast write/read speeds, CMOS compatibility, and high memory density. However, existing MRAM technologies such as spin-transfer torque MRAM (STT-MRAM) and spin-orbit torque MRAM (SOT-MRAM), have inherent limitations. STT-MRAM faces high write current requirements, while SOT-MRAM introduces significant area overhead due to additional access transistors. The new STT-assisted-SOT (SAS) MRAM provides an area-efficient alternative by sharing one write access transistor for multiple magnetic tunnel junctions (MTJs). This work presents the first fully digital processing-in-SAS-MRAM system to enable 8-bit floating-point (FP8) neural network inference with an application in on-device session-based recommender system. A SAS-MRAM device prototype is fabricated with 4 MTJs sharing the same SOT metal line. The proposed SAS-MRAM-based PIM macro is designed in TSMC 28nm technology. It achieves 15.31 TOPS/W energy efficiency and 269 GOPS performance for FP8 operations at 700 MHz. Compared to state-of-the-art recommender systems for the same popular YooChoose dataset, it demonstrates a 86 ×, 1.8 ×, and 1.12 × higher energy efficiency than that of GPU, SRAM-PIM, and ReRAM-PIM, respectively.more » « less
- 
            Abstract Spin Orbit Torque Magnetic RAM (SOT-MRAM) is emerging as a promising memory technology owing to its high endurance, reliability and speed. A critical factor for its success is the development of materials that exhibit efficient conversion of charge current to spin current, characterized by their spin Hall efficiency. In this work, it is experimentally demonstrated that the spin Hall efficiency of the industrially relevant ultra-thin Ta can be enhanced by more than 25× when a monolayer (ML) WSe2is inserted as an underlayer. The enhancement is attributed to spin absorption at the Ta/WSe2interface, suggested by harmonic Hall measurements. The presented hybrid spin Hall stack with a 2D WSe2underlayer has a total body thickness of less than 2 nm and exhibits greatly enhanced spin Hall efficiency, which makes this hybrid a promising candidate for energy efficient SOT-MRAM.more » « less
- 
            Abstract Giant spin-orbit torque (SOT) from topological insulators (TIs) provides an energy efficient writing method for magnetic memory, which, however, is still premature for practical applications due to the challenge of the integration with magnetic tunnel junctions (MTJs). Here, we demonstrate a functional TI-MTJ device that could become the core element of the future energy-efficient spintronic devices, such as SOT-based magnetic random-access memory (SOT-MRAM). The state-of-the-art tunneling magnetoresistance (TMR) ratio of 102% and the ultralow switching current density of 1.2 × 105 A cm−2have been simultaneously achieved in the TI-MTJ device at room temperature, laying down the foundation for TI-driven SOT-MRAM. The charge-spin conversion efficiencyθSHin TIs is quantified by both the SOT-induced shift of the magnetic switching field (θSH = 1.59) and the SOT-induced ferromagnetic resonance (ST-FMR) (θSH = 1.02), which is one order of magnitude larger than that in conventional heavy metals. These results inspire a revolution of SOT-MRAM from classical to quantum materials, with great potential to further reduce the energy consumption.more » « less
 An official website of the United States government
An official website of the United States government 
				
			 
					 
					
 
                                    