The emergence of embedded magnetic random-access memory (MRAM) and its integration in mainstream semiconductor manufacturing technology have created an unprecedented opportunity for engineering computing systems with improved performance, energy efficiency, lower cost, and unconventional computing capabilities. While the initial interest in the existing generation of MRAM—which is based on the spin-transfer torque (STT) effect in ferromagnetic tunnel junctions—was driven by its nonvolatile data retention and lower cost of integration compared to embedded Flash (eFlash), the focus of MRAM research and development efforts is increasingly shifting toward alternative write mechanisms (beyond STT) and new materials (beyond ferromagnets) in recent years. This has been driven by the need for better speed vs density and speed vs endurance trade-offs to make MRAM applicable to a wider range of memory markets, as well as to utilize the potential of MRAM in various unconventional computing architectures that utilize the physics of nanoscale magnets. In this Perspective, we offer an overview of spin–orbit torque (SOT) as one of these beyond-STT write mechanisms for the MRAM devices. We discuss, specifically, the progress in developing SOT-MRAM devices with perpendicular magnetization. Starting from basic symmetry considerations, we discuss the requirement for an in-plane bias magnetic field which has hindered progress in developing practical SOT-MRAM devices. We then discuss several approaches based on structural, magnetic, and chiral symmetry-breaking that have been explored to overcome this limitation and realize bias-field-free SOT-MRAM devices with perpendicular magnetization. We also review the corresponding material- and device-level challenges in each case. We then present a perspective of the potential of these devices for computing and security applications beyond their use in the conventional memory hierarchy.
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DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications
Non-volatile memory (NVM) technologies such as spin-transfer torque magnetic random access memory (STT-MRAM) and spin-orbit torque magnetic random access memory (SOT-MRAM) have significant advantages compared to conventional SRAM due to their non-volatility, higher cell density, and scalability features. While previous work has investigated several architectural implications of NVM for generic applications, in this work we present DeepNVM, a framework to characterize, model, and analyze NVM-based caches in GPU architectures for deep learning (DL) applications by combining technologyspecific circuit-level models and the actual memory behavior of various DL workloads. We present both iso-capacity and isoarea performance and energy analysis for systems whose lastlevel caches rely on conventional SRAM and emerging STT-MRAM and SOT-MRAM technologies. In the iso-capacity case, STT-MRAM and SOT-MRAM provide up to 4.2× and 5× energy-delay product (EDP) reduction and 2.4× and 3× area reduction compared to conventional SRAM, respectively. Under iso-area assumptions, STT-MRAM and SOT-MRAM provide 2.3× EDP reduction on average across all workloads when compared to SRAM. Our comprehensive cross-layer framework is demonstrated on STT-/SOT-MRAM technologies and can be used for the characterization, modeling, and analysis of any NVM technology for last-level caches in GPU platforms for deep learning applications.
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- NSF-PAR ID:
- 10125756
- Date Published:
- Journal Name:
- 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
- Page Range / eLocation ID:
- 1295 to 1298
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.23919/DATE48585.2020.9116263
