An ultra low current and low voltage rail-to-rail input-output class AB amplifier is presented that is based on standard 0.18 micron digital CMOS. Operating under the subthreshold region, the amplifier is capable of running at high speeds, with a supply voltage (V DD ) as low as ∼ 0.6V. The main contributions of this work are: First, a primarily current-mode rail-to-rail output stage is presented that employs Minimum Current Selectors (MCS) which monitor the sink-source currents of the output buffer transistors. Concurrently, Current Feedback Amplifiers (CFA) composed of Inverting Current Mirrors (ICM) regulate the minimum stand-by currents for either the non-sinking or non-sourcing output transistors, while allowing maximum currents to run through the sinking or sourcing transistors. As such, the output stage, in its basic configuration, can deliver a wide dynamic range at high speeds with V DD as low as ∼ V GS +2V DS . Second, a Floating Current Source (FCS) is utilized in the main amplifier that can also operate with V DD as low as ∼ V GS +2V DS . Montecarlo (MC) and worst case (WC) simulation show the following specifications are achievable: V DD minimum ∼ 0.6v; I DD ∼ 330nA; Input range rail-to-rail; offset voltage ∼ 6mV; Output range ∼ 25mV from the rails; open loop gain (Av) ∼ 78dB with unity gain frequency (fu) ∼ 1MHz and phase margin (PM) ∼ 40 degrees; power supply rejection ratio (PSRR) ∼ −83dB; common mode rejection ration (CMRR) ∼ −98dB; Slew rate (SR) ∼ 2V/us; Settling time (ts) ∼ 3uS to ∼ 2mV; rail-to-rail output voltage swing with R L ∼ 5K ohms, and size ∼ 120um/side.
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Compact ultra low power class AB buffer amplifier
Targeting the energy harvesting applications that require multiple channels of matched buffer amplifiers on a chip, a small rail-to-rail input-output, ultra low current, and low supply voltage (VDD) buffer amplifier is presented. The contributions of this work are as follows: First, an output buffer driver utilizes a loser-take-all circuit (LTA) and a current mirror amplifier (CMA) circuit to regulate the current in either of the inactive sink or source output driver transistors (FET). In conjunction with the LTA and CMA, a complementary noninverting current mirror (CNICM), monitors and rectifies the sink-source output signals before they are fed to the LTA circuit. Hence, the amplifier's current consumption, attributed to monitoring external loads, is substantially curbed. More importantly, because all the elements of the buffer driver (LTA, CMA, and CNICM) operate mainly in current mode, the output buffer driver is structurally fast and can operate with low V DD of about V GS +2V DS . Second, a floating current source (FCS) function is emulated that can also operate with low VDD and is fast in lieu of utilizing auxiliary common gate amplifiers (CGA). The FCS contains two complementary cascoded FET current sources where the middle cascoded FET's VGSs are held constant and their drain currents are criss-crossed and fed to each other's source terminals, while CGAs regulate the V GS s of the lower FETs, whose currents are substantially equalized and mirrored into the Amplifier's bias network. Montecarlo (MC) and worst case (WC) simulations indicate the following specifications are achievable: V DD minimum ∼ 0.8v; I DD ∼ 200nA; input voltage range rail to rail; output voltage range ∼ 10mV from the rails; open loop gain (A V ) ∼ 115dB with unity gain bandwidth (f U ) ∼ 600KHz and phase margin (PM) ∼ 30 degrees; power supply rejection ratio (PSRR) ∼ − 88dB; common mode rejection ratio (CMRR) ∼ − 120dB; slew rate (SR) ∼ 2V/ 5uS; settling time (t S ) ∼ 10uS; output resistor (R L ) capability ∼10K Ohms; and die size rough estimate is 100 um per side.
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- Award ID(s):
- 2208366
- PAR ID:
- 10539481
- Publisher / Repository:
- IEEE
- Date Published:
- ISSN:
- 2573-0770
- ISBN:
- 978-1-5386-0819-7
- Page Range / eLocation ID:
- 1 to 6
- Format(s):
- Medium: X
- Location:
- Ixtapa, Mexico
- Sponsoring Org:
- National Science Foundation
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