Jain, Vikram, Grubb, Daniel, Zhao, Jerry, Anderson, Kevin, Ho, Ken_T, Chi, Yufeng, Schwarz, Ella, Asanovi, Krste, Shao, Yakun_Sophia, and Nikolić, Borivoje. Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP. Retrieved from https://par.nsf.gov/biblio/10615221.

Jain, Vikram, Grubb, Daniel, Zhao, Jerry, Anderson, Kevin, Ho, Ken_T, Chi, Yufeng, Schwarz, Ella, Asanovi, Krste, Shao, Yakun_Sophia, & Nikolić, Borivoje. Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP. Retrieved from https://par.nsf.gov/biblio/10615221.

Jain, Vikram, Grubb, Daniel, Zhao, Jerry, Anderson, Kevin, Ho, Ken_T, Chi, Yufeng, Schwarz, Ella, Asanovi, Krste, Shao, Yakun_Sophia, and Nikolić, Borivoje. "Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP". Country unknown/Code not available: IEEE Symposium on VLSI Technology and Circuits. https://par.nsf.gov/biblio/10615221.

@article{osti_10615221,
place = {Country unknown/Code not available}, title = {Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP}, url = {https://par.nsf.gov/biblio/10615221}, abstractNote = {}, journal = {}, publisher = {IEEE Symposium on VLSI Technology and Circuits}, author = {Jain, Vikram and Grubb, Daniel and Zhao, Jerry and Anderson, Kevin and Ho, Ken_T and Chi, Yufeng and Schwarz, Ella and Asanovi, Krste and Shao, Yakun_Sophia and Nikolić, Borivoje}, }