Ku, Jonathan Hao-Cheng, Zhang, Junyao, Shan, Haoxuan, Samudrala, Saichand, Wu, Jiawen, Zheng, Qilin, Li, Ziru, Rajendran, Jeyavijayan, and Chen, Yiran. ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM. Retrieved from https://par.nsf.gov/biblio/10624132. Web. doi:10.1145/3649329.3656496.

Ku, Jonathan Hao-Cheng, Zhang, Junyao, Shan, Haoxuan, Samudrala, Saichand, Wu, Jiawen, Zheng, Qilin, Li, Ziru, Rajendran, Jeyavijayan, & Chen, Yiran. ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM. Retrieved from https://par.nsf.gov/biblio/10624132. https://doi.org/10.1145/3649329.3656496

Ku, Jonathan Hao-Cheng, Zhang, Junyao, Shan, Haoxuan, Samudrala, Saichand, Wu, Jiawen, Zheng, Qilin, Li, Ziru, Rajendran, Jeyavijayan, and Chen, Yiran. "ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM". Country unknown/Code not available: ACM. https://doi.org/10.1145/3649329.3656496. https://par.nsf.gov/biblio/10624132.

@article{osti_10624132,
place = {Country unknown/Code not available}, title = {ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM}, url = {https://par.nsf.gov/biblio/10624132}, DOI = {10.1145/3649329.3656496}, abstractNote = {}, journal = {}, publisher = {ACM}, author = {Ku, Jonathan Hao-Cheng and Zhang, Junyao and Shan, Haoxuan and Samudrala, Saichand and Wu, Jiawen and Zheng, Qilin and Li, Ziru and Rajendran, Jeyavijayan and Chen, Yiran}, }