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Abstract In this study, we explore the operation and performance of electrolyte-gated junctionless III-V nanowire (NW) transistors featuring compositionally graded In_xGa_1-xAs channels. These devices leverage the electric double-layer (EDL) gating mechanism at the electrolyte/semiconductor interface to achieve ultra-high charge carrier densities, surpassing those possible with conventional oxide dielectrics. Fermi–Dirac statistics are introduced by a numerical method to reproduce associated charge densities of EDL transistors. A 1 nm interfacial HfO₂layer is introduced to capture the electrostatics of the EDL, prevent charge transfer between the electrolyte and the semiconductor, and mimic the Stern layer. Device simulations are conducted to optimize the heterostructured NW composition and doping profile, followed by benchmarking against traditional HfO₂-gated structures. The EDL-gated device achieves anI_ON/I_OFFratio of 10⁶, with a subthreshold slope of 60 mV/dec and a threshold voltage of 0.31 V at a low drain voltage of 0.3 V, indicating a two-order magnitude improvement over conventional junctionless oxide-gated NW transistors. Computational methodologies include finite element modeling in COMSOL to extract voltage-dependent ion densities and subsequent device simulations using Silvaco's Atlas software. The results indicate that the optimized EDL-gated device exhibits superior electrostatic integrity and performance metrics compared to conventional gating methods. The findings underscore the potential of EDL gating in III-V NW configurations for advanced electronic applications, demonstrating significant improvements in switching characteristics and power efficiency. Further optimization and exploration of bias-dependent ionic concentrations and configurable device geometries highlight the robustness and scalability of this approach for next-generation low-power electronics. 

Self-assembly of vertically aligned III–V semiconductor nanowires (NWs) on two-dimensional (2D) van der Waals (vdW) nanomaterials allows for integration of novel mixed-dimensional nanosystems with unique properties for optoelectronic and nanoelectronic device applications. Here, selective-area vdW epitaxy (SA-vdWE) of InAs NWs on isolated 2D molybdenum disulfide (MoS 2 ) domains is reported for the first time. The MOCVD growth parameter space ( i.e. , V/III ratio, growth temperature, and total molar flow rates of metalorganic and hydride precursors) is explored to achieve pattern-free positioning of single NWs on isolated multi-layer MoS 2 micro-plates with one-to-one NW-to-MoS 2 domain placement. The introduction of a pre-growth poly- l -lysine surface treatment is highlighted as a necessary step for mitigation of InAs nucleation along the edges of triangular MoS 2 domains and for NW growth along the interior region of 2D micro-plates. Analysis of NW crystal structures formed under the optimal SA-vdWE condition revealed a disordered combination of wurtzite and zinc-blend phases. A transformation of the NW sidewall faceting structure is observed, resulting from simultaneous radial overgrowth during axial NW synthesis. A common lattice arrangement between axially-grown InAs NW core segments and MoS 2 domains is described as the epitaxial basis for vertical NW growth. A model is proposed for a common InAs/MoS 2 sub-lattice structure, consisting of three multiples of the cubic InAs unit cell along the [21̄1̄] direction, commensurately aligned with a 14-fold multiple of the Mo–Mo (or S–S) spacing along the [101̄0] direction of MoS 2 hexagonal lattice. The SA-vdWE growth mode described here enables controlled hybrid integration of mixed-dimensional III–V-on-2D heterostructures as novel nanosystems for applications in optoelectronics, nanoelectronics, and quantum enabling technologies.